Patents by Inventor Gal Shalom

Gal Shalom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240095205
    Abstract: A system includes a bus interface and circuitry. The bus interface is configured to communicate with an external device over a peripheral bus. The circuitry is configured to support a plurality of widgets that perform primitive operations used in implementing peripheral-bus devices, to receive a user-defined configuration, which specifies a user-defined peripheral-bus device as a configuration of one or more of the widgets, and to implement the user-defined peripheral-bus device toward the external device over the peripheral bus, in accordance with the user-defined configuration.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 21, 2024
    Inventors: Daniel Marcovitch, Liran Liss, Aviad Shaul Yehezkel, Rabia Loulou, Oren Duer, Shahaf Shuler, Chenghuan Jia, Philip Browning Johnson, Gal Shalom, Omri Kahalon, Adi Merav Horowitz, Arpit Jain, Eliav Bar-Ilan, Prateek Srivastava
  • Publication number: 20240056411
    Abstract: System, methods, and devices for providing an address resolution service are provided. In one example, an Address Resolution Service (ARS) node is described as being in communication with one or more endpoints. The ARS node may include one or more circuits that respond to an ARS query message issued by the one or more endpoints with a response message that translates a layer three address to a layer two address.
    Type: Application
    Filed: August 9, 2022
    Publication date: February 15, 2024
    Inventors: Gal Shalom, Adi Horowitz, Jonatan Piasetzky, Omri Kahalon, Matty Kadosh, Aviad Shaul Yehezkel, Rabia Loulou, Liran Liss
  • Patent number: 11902372
    Abstract: Systems and methods enable session sharing for session-based remote direct memory access (RDMA). Multiple queue pairs (QPs) can be added to a single session and/or session group where each of the QPs has a common remote. Systems and methods may query a session ID for an existing session group and then use the session ID with an add QP request to join additional QPs to an existing session. Newly added QPs may share one or more features with existing QPs of the session group, such as encryption parameters. Additionally, newly added QPs may be configured with different performance or quality of service requirements, thereby isolating performance, and permitting true scaling for high performance computing applications.
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: February 13, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Adi Merav Horowitz, Rabia Loulou, Omri Kahalon, Gal Shalom, Aviad Yehezkel, Asaf Schwartz, Liran Liss
  • Patent number: 11861211
    Abstract: API in conjunction with a bridge chip and first and second hosts having first and second memories respectively. The bridge chip connects the memories. The API comprises key identifier registration functionality to register a key identifier for each of plural computer processes performed by the first host, thereby to define plural key identifiers; and/or access control functionality to provide at least computer process P1 performed by the first host with access, typically via the bridge chip, to at least local memory buffer M2 residing in the second memory, typically after the access control functionality first validates that process P1 has a key identifier which has been registered, e.g., via the key identifier registration functionality. Typically, the access control functionality also prevents at least computer process P2, performed by the first host, which has not registered a key identifier, from accessing local memory buffer M2, e.g., via the bridge chip.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: January 2, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Gal Shalom, Adi Horowitz, Omri Kahalon, Liran Liss, Aviad Yehezkel, Rabie Loulou
  • Publication number: 20230376450
    Abstract: A method for processing includes receiving a definition of a processing pipeline including multiple sequential processing stages. The processing pipeline is partitioned into a plurality of partitions. The first partition of the processing pipeline is executed on a first computational accelerator, whereby the first computational accelerator writes output data from a final stage of the first partition to an output buffer in a first memory. The output data are copied over a packet communication network to an input buffer in a second memory. The second partition of the processing pipeline is executed on a second computational accelerator using the copied output data in the second memory as input data to a first stage of the second partition.
    Type: Application
    Filed: September 14, 2022
    Publication date: November 23, 2023
    Inventors: Adit Ranadive, Omri Kahalon, Aviad Shaul Yehezkel, Liran Liss, Gal Shalom, Yorai Itzhak Zack, Tushar Khinvasara
  • Publication number: 20230339122
    Abstract: The present disclosure relates to a robotic grasping hand having a central palm; a plurality of fingers connected to said palm, each of said fingers including a fingertip movable along a length of said fingers; wherein the fingers are placed on a common imaginary plane and are angularly displaceable thereon. The present disclosure relates to a corresponding system and method for activating the grasping hand.
    Type: Application
    Filed: June 20, 2021
    Publication date: October 26, 2023
    Inventors: Yoav GOLAN, Amir SHAPIRO, Elon RIMON, Gal Shalom LEVI
  • Publication number: 20230236769
    Abstract: Methods and systems provided herein involve extracting an input/output (I/O) operation from a packet received over an I/O pipeline, the I/O operation comprising either a read request to read data from at least one storage device or a write request to write data to the at least one storage device; determining that an address associated with the I/O operation exists in a lookup table that is provided for thin provisioning of the at least one storage device; performing one or more RAID calculations associated with the at least one storage device based on the address and the I/O operation; and accessing the at least one storage device to perform the I/O operation based on the one or more RAID calculations; and second processing component configured to carry out a second set of operations that occur when the address associated with the I/O operation does not exist in the lookup table.
    Type: Application
    Filed: January 27, 2022
    Publication date: July 27, 2023
    Inventors: Omri Kahalon, Gal Shalom, Aviad Yehezkel, Liran Liss, Oren Duer, Rabie Loulou, Maxim Gurtovoy
  • Publication number: 20230176769
    Abstract: API in conjunction with a bridge chip and first and second hosts having first and second memories respectively. The bridge chip connects the memories. The API comprises key identifier registration functionality to register a key identifier for each of plural computer processes performed by the first host, thereby to define plural key identifiers; and/or access control functionality to provide at least computer process P1 performed by the first host with access, typically via the bridge chip, to at least local memory buffer M2 residing in the second memory, typically after the access control functionality first validates that process P1 has a key identifier which has been registered, e.g., via the key identifier registration functionality. Typically, the access control functionality also prevents at least computer process P2, performed by the first host, which has not registered a key identifier, from accessing local memory buffer M2, e.g., via the bridge chip.
    Type: Application
    Filed: December 6, 2021
    Publication date: June 8, 2023
    Inventors: Gal Shalom, Adi Horowitz, Omri Kahalon, Liran Liss, Aviad Yehezkel, Rabie Loulou
  • Publication number: 20140310992
    Abstract: A foldable footwear comprising a sole fabricated using a single manufacturing casting, the sole comprising at least two portions, a front portion and a back portion and a groove in the ground side of the sole extending laterally from one side of the sole to the other side of the sole. The footwear can be folded in one direction only where the ground side of the sole is folded into itself.
    Type: Application
    Filed: June 30, 2014
    Publication date: October 23, 2014
    Inventors: Mor Talia Shalom, Sivan Gal Shalom
  • Patent number: 8763275
    Abstract: A foldable footwear comprising a sole fabricated using a single manufacturing casting, the sole comprising at least two portions, a front portion and a back portion and a groove in the ground side of the sole extending laterally from one side of the sole to the other side of the sole. The footwear can be folded in one direction only where the ground side of the sole is folded into itself.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: July 1, 2014
    Inventors: Mor Talia Shalom, Sivan Gal Shalom
  • Publication number: 20120079745
    Abstract: A foldable footwear comprising a sole fabricated using a single manufacturing casting, the sole comprising at least two portions, a front portion and a back portion and a groove in the ground side of the sole extending laterally from one side of the sole to the other side of the sole. The footwear can be folded in one direction only where the ground side of the sole is folded into itself.
    Type: Application
    Filed: May 2, 2011
    Publication date: April 5, 2012
    Applicant: STAND ALONE LTD
    Inventors: Mor Talia Shalom, Sivan Gal Shalom