Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.

Abstract: Systems and methods for a controller including controller memory and logic are presented herein. The logic is configured to control access to a persistent storage media and, in response to one or more commands, the logic determines an intermediate parity value based on a first parity calculation, and using the intermediate parity value determines a final parity value based on the intermediate parity value and a second parity calculation. Determining the intermediate parity value includes sending a uni-directional command to read an old data value from an address indicated in the uni-directional command, perform an exclusive-or operation on the old data value and a new data value indicated in the uni-directional command to determine the intermediate parity value and store, in the persistent storage media, the intermediate parity value at a location associated to an index indicated in the uni-directional command.

Abstract: A stacking device may include a negative delivery structure, a separator delivery structure, a first heater and a positive delivery structure. The negative delivery structure may be configured to deliver a negative electrode sheet. The separator delivery structure may be configured to deliver separators to two sides of the negative electrode sheet such that the separators are attached to the negative electrode sheet. The first heater may be arranged downstream of the separator delivery structure and configured to heat the negative electrode sheet and the separators. The positive delivery structure may be arranged downstream of the first heater and configured to deliver positive electrode sheets to the two sides of the negative electrode sheet such that the positive electrode sheets are attached to the separators.

Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.

Abstract: Provided are an electrode assembly, a battery cell, a battery and an electrical device, belonging to the technical field of battery manufacturing. The electrode assembly comprises: a first electrode sheet, comprising a plurality of bending segments and a plurality of stacking segments arranged in layers, wherein each bending segment is configured to connect two adjacent stacking segments, the first electrode sheet has a first broken seam, and the first broken seam extends in the width direction of the first electrode sheet to break the first electrode sheet; and a plurality of second electrode sheets, wherein the polarity of the second electrode sheet is opposite to the polarity of the first electrode sheet, and each second electrode sheet is arranged between two adjacent stacking segments in the stacking direction of the plurality of stacking segments.

Abstract: An asynchronous rolling mill with a super large diameter ratio comprises a rolling mill stand, a press-down device, a balancing device, an upper roll system, and an arc-shaped plate device. The arc-shaped plate device comprises an arc-shaped plate, the arc-shaped plate is arranged opposite to the upper roll, and the arc-shaped plate and the upper roll are cooperated to roll strips. The present disclosure also provides a method for rolling a strip using an asynchronous rolling mill with a super large diameter ratio. The asynchronous rolling mill can roll with super large diameter ratio and different speeds, and has a large angle to engage, thereby reducing the external friction force of a workpiece and improving strip forming quality.

Abstract: A semiconductor structure and a fabrication method are provided. The semiconductor structure includes: a base substrate, an optical waveguide layer over the base substrate; a first dielectric layer over the base substrate; a cavity between the first dielectric layer and the optical waveguide layer; and a second dielectric layer on the first dielectric layer and the optical waveguide layer. The cavity is located on sidewall surfaces of the optical waveguide layer and has a bottom coplanar with a bottom of the optical waveguide layer. The second dielectric layer is located on a top of the cavity and seals the cavity.

Abstract: An asynchronous rolling mill with a super large diameter ratio comprises a rolling mill stand, a press-down device, a balancing device, an upper roll system, and an arc-shaped plate device. The arc-shaped plate device comprises an arc-shaped plate, the arc-shaped plate is arranged opposite to the upper roll, and the arc-shaped plate and the upper roll are cooperated to roll strips. The present disclosure also provides a method for rolling a strip using an asynchronous rolling mill with a super large diameter ratio. The asynchronous rolling mill can roll with super large diameter ratio and different speeds, and has a large angle to engage, thereby reducing the external friction force of a workpiece and improving strip forming quality.

Abstract: An apparatus includes a rectifier coupled to a coil of a wireless power transfer system, the rectifier comprising a first leg and a second leg, wherein the first leg comprises a first switch and a second switch connected in series between a first voltage bus and a second voltage bus, and the second leg comprise a third switch and a fourth switch connected in series between the first voltage bus and the second voltage bus, and wherein a gate drive signal of the first switch is derived from a signal in phase with a voltage on a first terminal of the coil, and a gate drive signal of the third switch is derived from a signal in phase with a voltage on a second terminal of the coil.

Abstract: A semiconductor structure and a fabrication method are provided. The semiconductor structure includes: a base substrate, an optical waveguide layer over the base substrate; a first dielectric layer over the base substrate; a cavity between the first dielectric layer and the optical waveguide layer; and a second dielectric layer on the first dielectric layer and the optical waveguide layer. The cavity is located on sidewall surfaces of the optical waveguide layer and has a bottom coplanar with a bottom of the optical waveguide layer. The second dielectric layer is located on a top of the cavity and seals the cavity.

Abstract: An apparatus includes a rectifier coupled to a coil of a wireless power transfer system, the rectifier comprising a first leg and a second leg, wherein the first leg comprises a first switch and a second switch connected in series between a first voltage bus and a second voltage bus, and the second leg comprise a third switch and a fourth switch connected in series between the first voltage bus and the second voltage bus, and wherein a gate drive signal of the first switch is derived from a signal in phase with a voltage on a first terminal of the coil, and a gate drive signal of the third switch is derived from a signal in phase with a voltage on a second terminal of the coil.

Abstract: A device comprises a first current sense apparatus coupled to a first switching element of a power conversion apparatus, a second current sense apparatus coupled to a second switching element of the power conversion apparatus and a current sense processing apparatus configured to receive detected current signals from the first current sense apparatus and the second current sense apparatus, and generate an average current signal and a peak current signal.

Abstract: An apparatus includes a first switch and a second switch connected in series between a first voltage bus and a second voltage bus, wherein a common node of the first switch and the second switch is connected to a first terminal of a first coil magnetically coupled to a second coil, and a third switch and a fourth switch connected in series between the first voltage bus and the second voltage bus, wherein a common node of the third switch and the fourth switch is coupled to a second terminal of the first coil, and wherein a gate of the first switch is controlled by a first signal derived from a signal on the common node of the third switch and the fourth switch, and a gate of the third switch is controlled by a second signal derived from a signal on the common node of the first switch and the second switch.

Abstract: An apparatus includes a first switch and a second switch connected in series between a first voltage bus and a second voltage bus, wherein a common node of the first switch and the second switch is connected to a first terminal of a first coil magnetically coupled to a second coil, and a third switch and a fourth switch connected in series between the first voltage bus and the second voltage bus, wherein a common node of the third switch and the fourth switch is coupled to a second terminal of the first coil, and wherein a gate of the first switch is controlled by a first signal derived from a signal on the common node of the third switch and the fourth switch, and a gate of the third switch is controlled by a second signal derived from a signal on the common node of the first switch and the second switch.

Abstract: A device comprises a first current sense apparatus coupled to a first switching element of a power conversion apparatus, a second current sense apparatus coupled to a second switching element of the power conversion apparatus and a current sense processing apparatus configured to receive detected current signals from the first current sense apparatus and the second current sense apparatus, and generate an average current signal and a peak current signal.

Abstract: The present invention provides a method and device for reducing interference. By using correlation of a modulation signal, interference between intra-frequency cells can be reduced, and downlink receiving performance can be improved, thereby improving performance of a communications system.