Patents by Inventor Garin S. Bircsak

Garin S. Bircsak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7145504
    Abstract: A system for generating a simulated radar return signal. The novel system includes a processor adapted to receive target and waveform parameters and in accordance therewith generate a composite digital signal, and a digital to analog converter adapted to convert the digital signal to an analog signal. The system also includes an upconverter adapted to convert the analog signal to radio frequency. The processor calculates time-domain digital data samples representing a composite radar return waveform based on the target and waveform parameters. These data samples are output at each time interval that the digital to analog converter samples data. The composite waveform can include returns from a large number of targets and from targets embedded in clutter. The system can also be adapted to test a radar system having multiple antenna ports by replicating the basic design for each port.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: December 5, 2006
    Assignee: Raytheon Company
    Inventors: Irwin L. Newberg, John K. Keigharn, Jonathan D. Gordon, Garin S. Bircsak
  • Patent number: 6384771
    Abstract: An automated simulator for radar and sonar applications. The inventive simulator is implemented in hardware and generates current parameters with respect to a simulated target in response to a plurality of initial values with respect thereto. In the illustrative embodiment, the initial values include range, velocity, and acceleration and are stored in first, second and third register respectively. In the best mode, the invention is implemented in a field-programmable gate array. The inventive target simulator also includes a range delay circuit for generating a simulated return from the simulated target. The range delay circuit includes logic for determining whether a simulated pulse train to be received is ambiguous or unambiguous and adjusting the pulse repetition rate of the pulse train accordingly. The range delay circuit calculates die initial time that a packet needs to make the trip to and from the target.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: May 7, 2002
    Assignee: Raytheon Company
    Inventors: Warren J. Montague, Garin S. Bircsak, John K. Keigharn, Jorge L. Barboza, Robert W. Erwin
  • Patent number: 4644357
    Abstract: The simulation of clutter echo return signals for a radar system is accomplished using two sets of diode noise sources, a frequency synthesizer for bandwidth control, multiplexing control, two D/A converters and mixers, a 90-degree sower splitter, and a summer; the output of the summer being the simulated clutter. The two sets of noise sources each produce a digital encoded controlled bandwidth Gaussian noise signal which is strobed by the multiplexing control unit firstly to the pulse repetition interval of the radar system and secondly to the data rate of the radar system. The two strobed D/A converters convert the two digital noise signals into their analog equivalents. The two separate video channels are required to obtain the Rayleigh noise distribution characteristic of clutter. This distribution results when the analog signals from the D/A converters are multiplied with in-phase and quadrature RF reference frequencies in the two mixers, then summed in the summer.
    Type: Grant
    Filed: September 4, 1985
    Date of Patent: February 17, 1987
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Gregory Schaaf, Garin S. Bircsak