Patents by Inventor Garry Anthony Mercaldi
Garry Anthony Mercaldi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7651956Abstract: A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The process includes varying the temperature within a reaction chamber while a layer of a material is formed upon the semiconductor substrate. Varying the temperature within the reaction chamber facilitates temperature uniformity across the semiconductor wafer. As a result, a layer forming reaction occurs at a substantially consistent rate over the entire active surface of the semiconductor substrate. The process may also include oscillating the temperature within the reaction chamber while a layer of a material is being formed upon a semiconductor substrate.Type: GrantFiled: December 6, 2000Date of Patent: January 26, 2010Assignee: Micron Technology, Inc.Inventors: Garry Anthony Mercaldi, Don Carl Powell
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Patent number: 7535047Abstract: An ultra thin dielectric film or dielectric layer on a semiconductor device is disclosed. In one embodiment, an oxide layer is formed over a substrate. A silicon-containing material is deposited over the oxide layer. The deposited material and oxide layer are processed in a plasma to form the dielectric layer or ultra thin dielectric film. The silicon-containing dielectric layer can allow for improved or smaller semiconductor devices. The silicon containing dielectric layer can be fabricated at low temperatures. Improved or smaller semiconductor devices may be accomplished by reducing leakage, increasing the dielectric constant or fabricating at lower temperatures.Type: GrantFiled: August 20, 2004Date of Patent: May 19, 2009Assignee: Micron Technology, Inc.Inventors: Vishnu Agarwal, Garry Anthony Mercaldi
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Patent number: 7245010Abstract: Systems and devices are disclosed utilizing a silicon-containing barrier layer. A semiconductor device is disclosed and includes a substrate, a gate oxide, a silicon-containing barrier layer and a gate electrode. The gate oxide is formed over the substrate. The silicon-containing barrier layer is formed over the gate oxide by causing silicon atoms of a precursor layer to react with a reactive agent. The gate electrode is formed over the silicon-containing barrier layer.Type: GrantFiled: August 9, 2005Date of Patent: July 17, 2007Assignee: Micron Technology, Inc.Inventors: Don Carl Powell, Garry Anthony Mercaldi, Ronald A. Weimer
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Patent number: 7193273Abstract: A method of selectively forming contact regions on a substrate having a plurality of exposed regions includes selectively forming a contact region on each of the exposed regions of the substrate. During formation, each contact region has a first growth rate in a first direction and a second growth rate in a second direction. While each contact region is being selectively formed on the respective exposed region, the contact region is heated to increase the first growth rate of the contact region in the first direction relative to the second growth rate of the contact region in the second direction. The first growth rate may be a vertical growth rate and the second growth rate may be a lateral growth rate. The contact may be heated by applying electromagnetic radiation to an upper surface of the substrate and not applying the radiation to the vertical portions of the contact region to thereby increase the vertical growth rate relative to the lateral growth rate.Type: GrantFiled: February 13, 2002Date of Patent: March 20, 2007Assignee: Micron Technology, Inc.Inventors: Michael Nuttall, Garry Anthony Mercaldi
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Patent number: 7095088Abstract: Systems and devices are disclosed utilizing a silicon-containing barrier layer. A semiconductor device is disclosed and includes a substrate, a gate oxide, a silicon-containing barrier layer and a gate electrode. The gate oxide is formed over the substrate. The silicon-containing barrier layer is formed over the gate oxide by causing silicon atoms of a precursor layer react with a reactive agent. The gate electrode is formed over the silicon-containing barrier layer.Type: GrantFiled: June 3, 2004Date of Patent: August 22, 2006Assignee: Micron Technology, Inc.Inventors: Don Carl Powell, Garry Anthony Mercaldi, Ronald A. Weimer
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Patent number: 7060514Abstract: A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate includes varying the temperature within a reaction chamber while a layer of a material is formed upon the semiconductor substrate. Varying the temperature within the reaction chamber facilitates temperature uniformity across the semiconductor wafer. As a result, a layer forming reaction occurs at a substantially consistent rate over the entire active surface of the semiconductor substrate. The process may also include oscillating the temperature within the reaction chamber while a layer of a material is being formed upon a semiconductor substrate.Type: GrantFiled: December 21, 2004Date of Patent: June 13, 2006Assignee: Micron Technology, Inc.Inventors: Garry Anthony Mercaldi, Don Carl Powell
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Patent number: 6998356Abstract: A method of fabricating a semiconductor device including a silicon-containing dielectric layer is provided. In one embodiment, a silicon-containing material is deposited on a substrate. The deposited material is processed with a reactive agent to react with silicon atoms of the deposited material to form the dielectric layer. The silicon-containing dielectric layer provides for improved or smaller semiconductor devices by reducing leakage and increasing the dielectric constant.Type: GrantFiled: November 12, 2003Date of Patent: February 14, 2006Assignee: Micron Technology, Inc.Inventors: Don Carl Powell, Garry Anthony Mercaldi
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Patent number: 6960264Abstract: A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The process includes varying the temperature within a reaction chamber while a layer of a material is formed upon the semiconductor substrate. Varying the temperature within the reaction chamber facilitates temperature uniformity across the semiconductor wafer. As a result, a layer forming reaction occurs at a substantially consistent rate over the entire active surface of the semiconductor substrate. The process may also include oscillating the temperature within the reaction chamber while a layer of a material is being formed upon a semiconductor substrate.Type: GrantFiled: January 14, 2002Date of Patent: November 1, 2005Assignee: Micron Technology, Inc.Inventors: Garry Anthony Mercaldi, Don Carl Powell
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Patent number: 6837938Abstract: An apparatus for use with a deposition chamber includes a temperature control system that communicates with a heating element of the deposition chamber so as to not cause the formation of a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The apparatus causes uneven heat distribution across the surface of the substrate. The apparatus may also include a feedback control system that communicates with the temperature control system so as to cause the temperature control system to alter the heat output by the heating element and, thereby, to enhance the uniformity of at least one property of the material layer being deposited.Type: GrantFiled: May 8, 2003Date of Patent: January 4, 2005Assignee: Micron Technology, Inc.Inventors: Garry Anthony Mercaldi, Don Carl Powell
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Patent number: 6833280Abstract: A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The process includes varying the temperature within a reaction chamber while a layer of a material is formed upon the semiconductor substrate. Varying the temperature within the reaction chamber facilitates temperature uniformity across the semiconductor wafer. As a result, a layer forming reaction occurs at a substantially consistent rate over the entire active surface of the semiconductor substrate. The process may also include oscillating the temperature within the reaction chamber while a layer of a material is being formed upon a semiconductor substrate.Type: GrantFiled: March 13, 1998Date of Patent: December 21, 2004Assignee: Micron Technology, Inc.Inventors: Garry Anthony Mercaldi, Don Carl Powell
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Patent number: 6821838Abstract: A method of forming an ultra thin dielectric film or dielectric layer on a semiconductor device is disclosed. In one embodiment of the present invention, an oxide layer is formed over a substrate. A silicon-containing material is deposited over the oxide layer. The deposited material and oxide layer are processed in a plasma to form the dielectric layer or ultra thin dielectric film. The silicon-containing dielectric layer can allow for improved or smaller semiconductor devices. The silicon containing dielectric layer can be fabricated at low temperatures. Improved or smaller semiconductor devices may be accomplished by reducing leakage, increasing the dielectric constant or fabricating at lower temperatures.Type: GrantFiled: October 18, 2002Date of Patent: November 23, 2004Assignee: Micron Technology, Inc.Inventors: Vishnu Agarwal, Garry Anthony Mercaldi
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Publication number: 20040217476Abstract: Systems and devices are disclosed utilizing a silicon-containing barrier layer. A semiconductor device is disclosed and includes a substrate, a gate oxide, a silicon-containing barrier layer and a gate electrode. The gate oxide is formed over the substrate. The silicon-containing barrier layer is formed over the gate oxide by causing silicon atoms of a precursor layer react with a reactive agent. The gate electrode is formed over the silicon-containing barrier layer.Type: ApplicationFiled: June 3, 2004Publication date: November 4, 2004Inventors: Don Carl Powell, Garry Anthony Mercaldi, Ronald A. Weimer
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Patent number: 6774443Abstract: Systems and devices are disclosed utilizing a silicon-containing barrier layer. A semiconductor device is disclosed. The semiconductor device includes a substrate, a gate oxide, a silicon-containing barrier layer and a gate electrode. The gate oxide is formed over the substrate. The silicon-containing barrier layer is formed over the gate oxide by causing silicon atoms of a precursor layer react with a reactive agent. The gate electrode is formed over the silicon-containing barrier layer. Other embodiments utilizing a barrier layer are disclosed.Type: GrantFiled: January 3, 2002Date of Patent: August 10, 2004Assignee: Micron Technology, Inc.Inventors: Don Carl Powell, Garry Anthony Mercaldi, Ronald A. Weimer
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Patent number: 6770574Abstract: Methods for fabricating a dielectric layer are provided. In one embodiment, a silicon-containing material is deposited on a substrate. The deposited material is processed with a reactive agent to react with silicon atoms of the deposited material to form the dielectric layer. The silicon-containing dielectric layer can allow for improved or smaller semiconductor devices. Improved or smaller semiconductor devices may be accomplished by reducing leakage and increasing the dielectric constant.Type: GrantFiled: February 21, 2002Date of Patent: August 3, 2004Assignee: Micron Technology, Inc.Inventors: Don Carl Powell, Garry Anthony Mercaldi
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Publication number: 20040106248Abstract: Semiconductor devices that utilize a silicon-containing dielectric layer are disclosed. In one embodiment, a silicon-containing material is deposited on a substrate. The deposited material is processed with a reactive agent to react with silicon atoms of the deposited material to form the dielectric layer. The silicon-containing dielectric layer provides for improved or smaller semiconductor devices by reducing leakage and increasing the dielectric constant.Type: ApplicationFiled: November 12, 2003Publication date: June 3, 2004Inventors: Don Carl Powell, Garry Anthony Mercaldi
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Patent number: 6680229Abstract: A method of selectively forming contact regions on a substrate having a plurality of exposed regions includes selectively forming a contact region on each of the exposed regions of the substrate. During formation, each contact region has a first growth rate in a first direction and a second growth rate in a second direction. While each contact region is being selectively formed on the respective exposed region, the contact region is heated to increase the first growth rate of the contact region in the first direction relative to the second growth rate of the contact region in the second direction. The first growth rate may be a vertical growth rate and the second growth rate may be a lateral growth rate. The contact may be heated by applying electromagnetic radiation to an upper surface of the substrate and not applying the radiation to the vertical portions of the contact region to thereby increase the vertical growth rate relative to the lateral growth rate.Type: GrantFiled: January 26, 2001Date of Patent: January 20, 2004Assignee: Micron Technology, Inc.Inventors: Michael Nuttall, Garry Anthony Mercaldi
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Patent number: 6670231Abstract: Semiconductor devices that utilize a silicon-containing dielectric layer are disclosed. In one embodiment, a silicon-containing material is deposited on a substrate. The deposited material is processed with a reactive agent to react with silicon atoms of the deposited material to form the dielectric layer. The silicon-containing dielectric layer provides for improved or smaller semiconductor devices by reducing leakage and increasing the dielectric constant.Type: GrantFiled: October 18, 2002Date of Patent: December 30, 2003Assignee: Micron Technology, Inc.Inventors: Don Carl Powell, Garry Anthony Mercaldi
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Patent number: 6649278Abstract: A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The process includes varying the temperature within a reaction chamber while a layer of a material is formed upon the semiconductor substrate. Varying the temperature within the reaction chamber facilitates temperature uniformity across the semiconductor wafer. As a result, a layer forming reaction occurs at a substantially consistent rate over the entire active surface of the semiconductor substrate. The process may also include oscillating the temperature within the reaction chamber while a layer of a material is being formed upon a semiconductor substrate.Type: GrantFiled: December 20, 2001Date of Patent: November 18, 2003Assignee: Micron Technology, Inc.Inventors: Garry Anthony Mercaldi, Don Carl Powell
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Publication number: 20030201068Abstract: An apparatus for use with a deposition chamber includes a temperature control system that communicates with a heating element of the deposition chamber so as to not cause the formation of a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The apparatus causes uneven heat distribution across the surface of the substrate. The apparatus may also include a feedback control system that communicates with the temperature control system so as to cause the temperature control system to alter the heat output by the heating element and, thereby, to enhance the uniformity of at least one property of the material layer being deposited.Type: ApplicationFiled: May 8, 2003Publication date: October 30, 2003Inventors: Garry Anthony Mercaldi, Don Carl Powell
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Patent number: 6576964Abstract: Semiconductor devices that utilize a silicon-containing dielectric layer are disclosed. In one embodiment, a silicon-containing material is deposited on a substrate. The deposited material is processed with a reactive agent to react with silicon atoms of the deposited material to form the dielectric layer. The silicon-containing dielectric layer provides for improved or smaller semiconductor devices by reducing leakage and increasing the dielectric constant.Type: GrantFiled: August 31, 2000Date of Patent: June 10, 2003Assignee: Micron Technology, Inc.Inventors: Don Carl Powell, Garry Anthony Mercaldi