Abstract: In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.

Abstract: In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.

Abstract: In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.

Abstract: In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.

Abstract: In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.

Abstract: A computer system includes a main processor and a security control processor that is coupled to the main processor and configured to control and monitor an operational state of the main processor. To ensure the computer system may be trusted, the security control processor may be configured to hold the main processor in a slave mode during initialization of the security control processor such that the main processor is not operable to fetch and execute instructions from an instruction source external to the main processor, for example. In addition, the security control processor may be configured to initialize the operational state of the main processor to a predetermined state by transferring to the main processor via a control interface one or more instructions and to cause the main processor to execute the one or more instructions while the main processor is held in the slave mode.

Abstract: In one embodiment, a computer system comprises one or more components and a secure computing environment coupled to the components. The secure computing environment is configured to program at least one of the components to enter a limited functionality mode responsive to expiration of a use right to the computer system, wherein operation of the computer system in the limited functionality mode is reduced compared to operation when the use right has not expired. The secure computing environment is configured to monitor the components in the limited functionality mode to detect that a limited functionality mode configuration has been modified by an unauthorized entity and to cause the computer system to enter a second mode in which operation of the computer system is reduced compared to operation in the limited functionality mode in response.

Abstract: In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.

Abstract: A device is disclosed that comprises a passenger vehicle having a camera wirelessly communicating with a wireless router 121. The device communicates wirelessly to provide information using Internet Protocol (IP). The wireless connection is compliant with a standard, such as 802.11x, G3, G4, or 802.16x, and is part of a local area network. Image information is requested from and provided by the camera.

Abstract: A network includes an Internet connection element and a plurality of wireless device access points. Each of the plurality of wireless device access points includes a wireless transceiver and each of the plurality of wireless device access points is coupled to the Internet connection element. A location of at least one of the plurality of wireless device access points is represented on a map that is accessible via the Internet.

Abstract: A speakerphone system (50, 70) implements automatic gain control (AGC) when it is in a talk mode. While in the talk mode, the speakerphone system (50, 70) applies a gain factor determined by conventional AGC techniques. The inverse of this gain factor is applied to the received signal to avoid the need to adapt the coefficients of an echo canceller, such as an acoustic echo canceller (AEC) (25), as the volume level changes. The speakerphone system (50, 70) determines whether it is in the talk, double-talk, or listen mode by adaptively changing energy thresholds which define these modes, in dependence on the distribution of ratios of the transmitted energy to received energy. The speakerphone system (50, 70) also varies a loop gain in dependence on the separation between the distribution of energy ratios in the talk mode and in the receive mode. This automatic loop gain adjustment ensures loop stability.

Abstract: A direct-path echo cancellation circuit includes a loudspeaker (12), first and second microphones (14, 16), and an in-phase signal cancellation circuit (21, 43). The first and second microphones (14, 16) are positioned adjacent the loudspeaker (12) in order to receive in-phase direct-path echo components (31, 32) of an output signal from the loudspeaker (12). The in-phase signal cancellation circuit (21 or 43) combines the in-phase direct-path echo components of the output signal in order to cancel the direct-path echo components. Direct-path echo cancellation helps to reduce howling and/or oscillation in a full-duplex speakerphone system. Also, direct-path echo cancellation provides more dynamic range to an input signal which is provided to a speakerphone signal processing system (26).

Abstract: A digital receiver, such as "C-QUAM" receiver (10), has phase error correction. In another form, a software program may be executed by a conventional digital signal processor to also implement phase error correction. A digital input signal is demodulated to form an in-phase and a quadrature component. The in-phase and quadrature components are processed by a digital envelope detector (24) to form a composite signal containing left and right audio channel information. The in-phase component and composite signal are both processed by a reciprocal cosine estimator (28) and a quadrature channel circuit (38) to provide a difference signal also containing left and right audio channel information. The difference signal is input to phase error correction circuitry (16, 22, 26) to estimate a phase error of the digital input signal. The estimated phase error is then used to correct an actual phase error of the digital input signal during demodulation.

Abstract: A filter structure uses multiple discrete filter circuits which are cascaded to provide a multiple tap filter of programmable tap length. In one form, an FIR filter may be implemented wherein each circuit generates partial sum operands which must be added to provide a filter output. The cascaded circuits perform partial addition operations near simultaneously by using a serial addition which is synchronized with a start bit. The number of taps in the filter structure implemented by the cascaded discrete filter circuits is variable and may be programmed with a programmable storage register in each discrete circuit which stores operand data fixing the tap length of each discrete circuit. The multiple filter circuits provide a single filter structure with a large tap length and high sampling rate.

Abstract: A piezoceramic device has two layers of piezoceramic material bonded together, the layers polarized in opposite directions. The device is used to detect, and indicate, a change of voltage between two conductors and specifically is used between the tip and ring lines of a telephone line having more than one extension, to give a line status indication. A visual, yet non-electrical, readout of one polarity is provided when the bending piezoelectric element moves into a window in the housing wall.

Abstract: In a telephone installation in which more than one telephone terminal is connected to one pair of conductors--Tip and Ring--a line status apparatus is provided for each telephone terminal, the apparatus sensing a change in line characteristics resulting from an "off-hook" condition at any telephone and producing an output which is used to provide an indication. Little or no current is drawn from the telephone lines. Typical examples are sensing variations in AC characteristics, as resulting from voice transmission, ringing tones and the like; sensing DC variations, such as voltage drop when a telephone is "off-hook". Indication is generally visual.