Patents by Inventor Gary A. Brist

Gary A. Brist has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10309781
    Abstract: Techniques for computing a magnetic heading based on sensor data are described herein. An example of a device in accordance with the present techniques includes a magnetic sensor to collect sensor output data and a heading computation engine to compute a magnetic heading based on the sensor output data. The heading computation engine includes logic to measure a level of noise in the sensor output data. The heading computation engine also includes logic to determine whether to average the sensor output data based, at least in part, on the level of noise. The heading computation engine also includes logic to determine an applied sensor output based on the sensor output data. The heading computation engine also includes logic to compute a magnetic heading based, at least in part, on the applied sensor output.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 4, 2019
    Assignee: Intel Corporation
    Inventors: Gary A. Brist, Kevin J. Daniel
  • Patent number: 9939497
    Abstract: A computing device, system, apparatus, and at least one machine readable medium for dynamically calibrating a magnetic sensor are described herein. The computing device includes a sensor hub and a magnetic sensor communicably coupled to the sensor hub. The magnetic sensor is configured to collect sensor data corresponding to the computing device. The computing device also includes a processor that is configured to execute stored instructions and a storage device that stores instructions. The storage device includes processor executable code that, when executed by the processor, is configured to determine a system state of the computing device and send the determined system state of the computing device to the sensor hub. The sensor hub is configured to dynamically calibrate the magnetic sensor based on the sensor data collected via the magnetic sensor and the determined system state of the computing device.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 10, 2018
    Assignee: Intel Corporation
    Inventors: Gary A. Brist, Kevin J. Daniel, Melissa A. Cowan
  • Patent number: 9872397
    Abstract: The present disclosure provides techniques for creating a symmetrical ball grid array pattern for an integrated circuit package. The ball grid array includes a symmetrical pattern of circuit connection points, wherein the symmetrical pattern is derived from a base hexagonal pattern that is repeated in at least one or more sections of the ball grid array.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: January 16, 2018
    Assignee: Intel Corporation
    Inventor: Gary Brist
  • Patent number: 9816814
    Abstract: In one example a magnetometer unit comprises logic, to receive first magnetic response data from a first magnetic sensor and second magnetic response data from a second magnetic sensor displaced from the first magnetic sensor, generate a composite response surface representation from the first magnetic response data and the second magnetic response data, and store the composite response surface representation in a non-transitory memory. Other examples may be described.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: November 14, 2017
    Assignee: Intel Corporation
    Inventors: Kevin J. Daniel, Gary A. Brist
  • Publication number: 20150377602
    Abstract: In one example a magnetometer unit comprises logic, to receive first magnetic response data from a first magnetic sensor and second magnetic response data from a second magnetic sensor displaced from the first magnetic sensor, generate a composite response surface representation from the first magnetic response data and the second magnetic response data, and store the composite response surface representation in a non-transitory memory. Other examples may be described.
    Type: Application
    Filed: June 25, 2014
    Publication date: December 31, 2015
    Inventors: KEVIN J. DANIEL, GARY A. BRIST
  • Publication number: 20140278190
    Abstract: A computing device, system, apparatus, and at least one machine readable medium for dynamically calibrating a magnetic sensor are described herein. The computing device includes a sensor hub and a magnetic sensor communicably coupled to the sensor hub. The magnetic sensor is configured to collect sensor data corresponding to the computing device. The computing device also includes a processor that is configured to execute stored instructions and a storage device that stores instructions. The storage device includes processor executable code that, when executed by the processor, is configured to determine a system state of the computing device and send the determined system state of the computing device to the sensor hub. The sensor hub is configured to dynamically calibrate the magnetic sensor based on the sensor data collected via the magnetic sensor and the determined system state of the computing device.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Gary A. Brist, Kevin J. Daniel, Melissa A. Cowan
  • Publication number: 20140278222
    Abstract: Techniques for computing a magnetic heading based on sensor data are described herein. An example of a device in accordance with the present techniques includes a magnetic sensor to collect sensor output data and a heading computation engine to compute a magnetic heading based on the sensor output data. The heading computation engine includes logic to measure a level of noise in the sensor output data. The heading computation engine also includes logic to determine whether to average the sensor output data based, at least in part, on the level of noise. The heading computation engine also includes logic to determine an applied sensor output based on the sensor output data. The heading computation engine also includes logic to compute a magnetic heading based, at least in part, on the applied sensor output.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Gary A. Brist, Kevin J. Daniel
  • Publication number: 20140153172
    Abstract: The present disclosure provides techniques for creating a symmetrical ball grid array pattern for an integrated circuit package. The ball grid array includes a symmetrical pattern of circuit connection points, wherein the symmetrical pattern is derived from a base hexagonal pattern that is repeated in at least one or more sections of the ball grid array.
    Type: Application
    Filed: December 5, 2012
    Publication date: June 5, 2014
    Inventor: Gary Brist
  • Patent number: 8732942
    Abstract: In some embodiments a high speed interconnect includes a layer of FR4 material, a trench in the layer of FR4 material, and a pair of transmission lines located near the trench. The trench is filled with a homogenous material. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: May 27, 2014
    Assignee: Intel Corporation
    Inventors: Stephen H. Hall, Bryce D. Horine, Gary A. Brist, Howard Heck
  • Patent number: 8307548
    Abstract: A method of making a printed circuit board panel, a printed circuit board panel made according to the method, and a system incorporating a printed circuit board provided onto the panel. The printed circuit board panel has a panel top edge, a panel bottom edge parallel to the panel top edge, and two parallel panel side edges, and further includes a first set of fiber bundles extending at the predetermined angle with respect to the panel side edges, and a second set of fiber bundles extending at the predetermined angle with respect to the panel top edge.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: November 13, 2012
    Assignee: Intel Corporation
    Inventors: William O. Alger, Gary B. Long, Gary A. Brist, Bryce D. Horine
  • Patent number: 8299369
    Abstract: An apparatus that includes a plurality of metalized planes, one or more dielectric layers separating the plurality of metalized planes; and one or more conductive trenches connecting to at least one of the plurality of metalized planes.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: October 30, 2012
    Assignee: Intel Corporation
    Inventors: Gary A. Brist, Gary Baxter Long, Daryl A. Sato
  • Patent number: 8056221
    Abstract: An apparatus that includes a plurality of metalized planes, one or more dielectric layers separating the plurality of metalized planes; and one or more conductive trenches connecting to at least one of the plurality of metalized planes.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: November 15, 2011
    Assignee: Intel Corporation
    Inventors: Gary A. Brist, Gary Baxter Long, Daryl A. Sato
  • Patent number: 7977581
    Abstract: An article of manufacture includes a circuit board and a pair of traces on or in the circuit board. The pair of traces includes a first trace and a second trace. The first trace includes a first segment and a second segment continuously joined to the first segment. The first segment coincides with a first longitudinal axis. The second trace includes a first segment that runs alongside the first segment of the first trace. The second trace also includes a second segment that runs alongside the second segment of the first trace. The second segment of the second trace is continuously joined to the first segment of the second trace. The second segment of the second trace coincides with the first longitudinal axis.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: July 12, 2011
    Assignee: Intel Corporation
    Inventors: Tao Liang, Stephen H. Hall, Howard Heck, Gary A. Brist, Bryce Horine
  • Publication number: 20100328919
    Abstract: A method of making a printed circuit board panel, a printed circuit board panel made according to the method, and a system incorporating a printed circuit board provided onto the panel. The printed circuit board panel has a panel top edge, a panel bottom edge parallel to the panel top edge, and two parallel panel side edges, and further includes a first set of fiber bundles extending at the predetermined angle with respect to the panel side edges, and a second set of fiber bundles extending at the predetermined angle with respect to the panel top edge.
    Type: Application
    Filed: September 14, 2010
    Publication date: December 30, 2010
    Inventors: William O. Alger, Gary B. Long, Gary A. Brist, Bryce D. Horine
  • Patent number: 7843057
    Abstract: A method of making a printed circuit board panel, a printed circuit board panel made according to the method, and a system incorporating a printed circuit board provided onto the panel. The printed circuit board panel has a panel top edge, a panel bottom edge parallel to the panel top edge, and two parallel panel side edges, and further includes a first set of fiber bundles extending at the predetermined angle with respect to the panel side edges, and a second set of fiber bundles extending at the predetermined angle with respect to the panel top edge.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: November 30, 2010
    Assignee: Intel Corporation
    Inventors: William O. Alger, Gary B. Long, Gary A. Brist, Bryce D. Horine
  • Patent number: 7797826
    Abstract: An apparatus that includes a plurality of metalized planes, one or more dielectric layers separating the plurality of metalized planes; and one or more conductive trenches connecting to at least one of the plurality of metalized planes.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: September 21, 2010
    Assignee: Intel Corporation
    Inventors: Gary A. Brist, Gary Baxter Long, Daryl A. Sato
  • Patent number: 7785114
    Abstract: Modification of the connections between a die package and a system board is described. In one example a pattern redistribution module is used in a socket. The module has a first array of contacts on one side of the module. The contacts have a first configuration to connect to the socket. A second array of contacts is on another side of the module opposite the first array of contacts and has a second configuration to connect to a package containing a die. A board is between the first and the second array of contacts to interconnect contacts of the first array of contacts to contacts of the second array of contacts.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: August 31, 2010
    Assignee: Intel Corporation
    Inventors: Gary Brist, Tom Ruttan, Ted Zarbock
  • Publication number: 20100202118
    Abstract: An article of manufacture includes a circuit board and a pair of traces on or in the circuit board. The pair of traces includes a first trace and a second trace. The first trace includes a first segment and a second segment continuously joined to the first segment. The first segment coincides with a first longitudinal axis. The second trace includes a first segment that runs alongside the first segment of the first trace. The second trace also includes a second segment that runs alongside the second segment of the first trace. The second segment of the second trace is continuously joined to the first segment of the second trace. The second segment of the second trace coincides with the first longitudinal axis.
    Type: Application
    Filed: April 9, 2010
    Publication date: August 12, 2010
    Inventors: Tao Liang, Stephen H. Hall, Howard Heck, Gary A. Brist, Bryce Horine
  • Patent number: 7723618
    Abstract: An article of manufacture includes a circuit board and a pair of traces on or in the circuit board. The pair of traces includes a first trace and a second trace. The first trace includes a first segment and a second segment continuously joined to the first segment. The first segment coincides with a first longitudinal axis. The second trace includes a first segment that runs alongside the first segment of the first trace. The second trace also includes a second segment that runs alongside the second segment of the first trace. The second segment of the second trace is continuously joined to the first segment of the second trace. The second segment of the second trace coincides with the first longitudinal axis.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: May 25, 2010
    Assignee: Intel Corporation
    Inventors: Tao Liang, Stephen H. Hall, Howard Heck, Gary A. Brist, Bryce Horine
  • Patent number: 7691458
    Abstract: Numerous embodiments of a carrier substrate having thermochromatic materials are described. In one embodiment of the present invention, a carrier substrate has a visible surface, and a thermochromatic material is disposed near the carrier substrate. The thermochromatic material produces a visual change of the visible surface when an activation temperature of the thermochromatic material is reached.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: April 6, 2010
    Assignee: Intel Corporation
    Inventors: Gary A. Brist, Patrick D. Boyd