Patents by Inventor Gary James Calder
Gary James Calder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11586734Abstract: Various implementations described herein relate to systems and methods for protecting data stored on a Solid State Drive (SSD) against malware, including determining, by a controller of the SSD, a typical traffic profile, receiving, by the controller, commands from a host, and determining, by the controller, that the commands are likely caused by malware by determining that the commands deviate from the typical traffic profile. In response to determining the commands are likely caused by the malware, the controller performs a malware response action.Type: GrantFiled: February 28, 2020Date of Patent: February 21, 2023Assignee: KIOXIA CORPORATIONInventors: Nigel Horspool, Gary James Calder
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Publication number: 20220291861Abstract: Various implementations described herein relate to systems and methods for a storage device (e.g., a Solid State Drive (SSD)) to perform a Compute Function (CF), including receiving a command from a host, the command identifying the CF, and in response to receiving the command, performing the CF on at least one of internal data stored in the storage device or external data transferred from the host to determine the computation result of the CF.Type: ApplicationFiled: March 12, 2021Publication date: September 15, 2022Applicant: Kioxia CorporationInventors: Krishna R. Malakapalli, Gary James Calder
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Patent number: 11321022Abstract: Various implementations described herein relate to systems and methods for a solid state drive (SSD) that includes requesting power credits while performing a program or erase operation for a flash memory of the SSD. In response to determining that the requested power credits are rejected, the program or erase operation is suspended and its power credits are released. A read operation may then be performed in response to suspending the program or erase operation and releasing its power credits.Type: GrantFiled: December 31, 2019Date of Patent: May 3, 2022Assignee: KIOXIA CORPORATIONInventors: Neil Buxton, Gary James Calder
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Patent number: 11256634Abstract: A memory system for storing and retrieving data may include a controller, a first switch, a second switch connected to the first switch via an interconnecting bus, and a plurality of memory devices. The controller may have a first serial interface. The first switch may have one or more serial interfaces and one or more memory ports. The first serial interface of the controller may be communicatively connected to a first serial interface of the one or more serial interfaces of the first switch via a first serial bus. Each of the one or more memory ports of the first switch may be communicatively connected to a subset of the plurality of memory devices via a memory bus. The first switch may transfer data between the controller and the subsets of the plurality of memory devices via the one or more memory ports.Type: GrantFiled: April 27, 2020Date of Patent: February 22, 2022Assignee: Kioxia CorporationInventors: Gary James Calder, Benjamin James Kerr, Philip Rose
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Publication number: 20210271757Abstract: Various implementations described herein relate to systems and methods for protecting data stored on a Solid State Drive (SSD) against malware, including determining, by a controller of the SSD, a typical traffic profile, receiving, by the controller, commands from a host, and determining, by the controller, that the commands are likely caused by malware by determining that the commands deviate from the typical traffic profile. In response to determining the commands are likely caused by the malware, the controller performs a malware response action.Type: ApplicationFiled: February 28, 2020Publication date: September 2, 2021Applicant: Kioxia CorporationInventors: Nigel Horspool, Gary James Calder
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Publication number: 20210200481Abstract: Various implementations described herein relate to systems and methods for a solid state drive (SSD) that includes requesting power credits while performing a program or erase operation for a flash memory of the SSD. In response to determining that the requested power credits are rejected, the program or erase operation is suspended and its power credits are released. A read operation may then be performed in response to suspending the program or erase operation and releasing its power credits.Type: ApplicationFiled: December 31, 2019Publication date: July 1, 2021Applicant: Kioxia CorporationInventors: Neil BUXTON, Gary James CALDER
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Publication number: 20200293466Abstract: A memory system for storing and retrieving data may include a controller, a first switch, a second switch connected to the first switch via an interconnecting bus, and a plurality of memory devices. The controller may have a first serial interface. The first switch may have one or more serial interfaces and one or more memory ports. The first serial interface of the controller may be communicatively connected to a first serial interface of the one or more serial interfaces of the first switch via a first serial bus. Each of the one or more memory ports of the first switch may be communicatively connected to a subset of the plurality of memory devices via a memory bus. The first switch may transfer data between the controller and the subsets of the plurality of memory devices via the one or more memory ports.Type: ApplicationFiled: April 27, 2020Publication date: September 17, 2020Applicant: Toshiba Memory CorporationInventors: Gary James Calder, Benjamin James Kerr, Philip Rose
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Patent number: 10635610Abstract: A memory system for storing and retrieving data may include a controller, a first switch, a second switch connected to the first switch via an interconnecting bus, and a plurality of memory devices. The controller may have a first serial interface. The first switch may have one or more serial interfaces and one or more memory ports. The first serial interface of the controller may be communicatively connected to a first serial interface of the one or more serial interfaces of the first switch via a first serial bus. Each of the one or more memory ports of the first switch may be communicatively connected to a subset of the plurality of memory devices via a memory bus. The first switch may transfer data between the controller and the subsets of the plurality of memory devices via the one or more memory ports.Type: GrantFiled: March 14, 2019Date of Patent: April 28, 2020Assignee: Toshiba Memory CorporationInventors: Gary James Calder, Benjamin James Kerr, Philip Rose
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Patent number: 10120817Abstract: The current consumed by flash memory devices on the channels of a solid-state drive (SSD) device will be in the form of a time varying waveform, characterized mainly by the types of commands being processed, and are often in the form of periods of constant levels interspersed with very short high current peaks or spikes. When multiple commands are being processed, significant high current peak demands and current surges can occur. The invention described herein is a device and method for scheduling commands to be processed in order to reduce the size of peak current demands and current surges. According to one embodiment of the invention, the device and method for scheduling a command uses look-up tables to determine the time to initiate the processing of the command by the flash memory devices.Type: GrantFiled: September 30, 2015Date of Patent: November 6, 2018Assignee: Toshiba Memory CorporationInventors: Julien Margetts, Gary James Calder
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Publication number: 20170090802Abstract: The current consumed by flash memory devices on the channels of a solid-state drive (SSD) device will be in the form of a time varying waveform, characterized mainly by the types of commands being processed, and are often in the form of periods of constant levels interspersed with very short high current peaks or spikes. When multiple commands are being processed, significant high current peak demands and current surges can occur. The invention described herein is a device and method for scheduling commands to be processed in order to reduce the size of peak current demands and current surges. According to one embodiment of the invention, the device and method for scheduling a command uses look-up tables to determine the time to initiate the processing of the command by the flash memory devices.Type: ApplicationFiled: September 30, 2015Publication date: March 30, 2017Inventors: Julien Margetts, Gary James Calder
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Patent number: 9141529Abstract: A host server computer system that includes a hypervisor within a virtual space architecture running at least one virtualization, acceleration and management server and at least one virtual machine, at least one virtual disk that is read from and written to by the virtual machine, a cache agent residing in the virtual machine, wherein the cache agent intercepts read or write commands made by the virtual machine to the virtual disk, and a solid state drive. The solid state drive includes a non-volatile memory storage device, a cache device and a memory device driver providing a cache primitives application programming interface to the cache agent and a control interface to the virtualization, acceleration and management server.Type: GrantFiled: August 14, 2012Date of Patent: September 22, 2015Assignee: OCZ Storage Solutions Inc.Inventors: Yaron Klein, Allon Leon Cohen, Gary James Calder, Franz Michael Schuette
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Patent number: 8996781Abstract: Architectures and methods for performing big data analytics by providing an integrated storage/processing system containing non-volatile memory devices that form a large, non-volatile memory array and a graphics processing unit (GPU) configured for general purpose (GPGPU) computing. The non-volatile memory array is directly functionally coupled (local) with the GPU and optionally mounted on the same board (on-board) as the GPU.Type: GrantFiled: November 6, 2012Date of Patent: March 31, 2015Assignee: OCZ Storage Solutions Inc.Inventors: Franz Michael Schuette, Gary James Calder, Yaron Klein, Stephen Jeffrey Smith
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Publication number: 20140129753Abstract: Architectures and methods for performing big data analytics by providing an integrated storage/processing system containing non-volatile memory devices that form a large, non-volatile memory array and a graphics processing unit (GPU) configured for general purpose (GPGPU) computing. The non-volatile memory array is directly functionally coupled (local) with the GPU and optionally mounted on the same board (on-board) as the GPU.Type: ApplicationFiled: November 6, 2012Publication date: May 8, 2014Applicant: OCZ Technology Group Inc.Inventors: Franz Michael Schuette, Gary James Calder, Yaron Klein, Stephen Jeffrey Smith
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Publication number: 20140052892Abstract: A host server computer system that includes a hypervisor within a virtual space architecture running at least one virtualization, acceleration and management server and at least one virtual machine, at least one virtual disk that is read from and written to by the virtual machine, a cache agent residing in the virtual machine, wherein the cache agent intercepts read or write commands made by the virtual machine to the virtual disk, and a solid state drive. The solid state drive includes a non-volatile memory storage device, a cache device and a memory device driver providing a cache primitives application programming interface to the cache agent and a control interface to the virtualization, acceleration and management server.Type: ApplicationFiled: August 14, 2012Publication date: February 20, 2014Applicant: OCZ TECHNOLOGY GROUP INC.Inventors: Yaron Klein, Allon Leon Cohen, Gary James Calder, Franz Michael Schuette
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Patent number: 6594347Abstract: Speech encoding in a client server system such as a laptop, personal data assistant or mobile phone communicating with an interactive voice response telephony application. A method of communication with a speech enabled remote telephony device such as a mobile phone is described comprising the following steps. Receiving user speech input into the mobile phone as part of a dialogue with an interactive voice response telephony application. Performing speech recognition to convert the speech into text and converting the text into tones such as DTMF tones. Transmitting the DTMF tones over the voice channel to an interactive voice response (IVR) telephony application an allowed response feature converts the users response to a known valid response of the IVR application. A language conversion feature allows a person in one language to speak in that language to an IVR application operating in a different language.Type: GrantFiled: April 18, 2000Date of Patent: July 15, 2003Assignee: International Business Machines CorporationInventors: Gary James Calder, George Murdoch Clelland, Anthony Timothy Farrell, Robert Mann, John Brian Pickering, Paul Reilly