Patents by Inventor Gary L. Stenerson

Gary L. Stenerson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4630172
    Abstract: A semiconductor chip carrier and contact array package having an apertured dielectric bottom layer (11), one or more chip connection layers such as wire bond layers (16, 17) insulated from one another, at least one chip-holding recess (24) in the wire bond layers and a heat conductive copper heat sink insert (26) extending across the aperture of the dielectric layer and forming a base adapted to be in heat-conductive contact with the bottom of an integrated circuit chip (27) to be attached thereon whereby heat flux generated by the chip is quickly and efficiently removed from the chip body. The wire bond layers (16, 17) contains metallization patterns (29) for bonding to the chip and a grid array of contacts or connection pins (20) connected to plated through-holes in the wire bond layer(s) for plugging the carrier to a circuit board or the like.
    Type: Grant
    Filed: March 9, 1983
    Date of Patent: December 16, 1986
    Assignee: Printed Circuits International
    Inventors: Gary L. Stenerson, Thomas J. Miller