Abstract: A semiconductor chip package and a method of making the package are disclosed. The method includes forming a lead frame having a die pad and leads. At least one of the leads has a tab projecting upward and laterally from a body of the lead. In one embodiment, curved tips are formed on the inner ends of the leads. At least a portion of the lead frame is encapsulated with a mold material to form a package mold having a cavity. The cavity has a floor with a thickness substantially similar to the thickness of the leads so as to expose upper surfaces of the inner ends of the leads. The leads have lower surfaces exposed at the lower surface of the package mold. The lead tab is entirely encapsulated within the package mold. A semiconductor die is mounted on the lead frame subsequent to the encapsulation of at least a portion of the lead frame. The semiconductor die is enclosed in the package mold by placing a covering such as a lid over the semiconductor die.

Abstract: A method for forming a snapable multi-package array substrate, snapable multi-package array and snapable packaged electronic components is disclosed. The snapable multi-package substrate is formed with trenches that separate and define sections where individual packaged electronic components are fabricated in a snapable multi-package array, and where individual packaged electronic components are singulated from the snapable multi-package array of the invention by simply applying hand pressure to break or “snap” individual packaged electronic components apart.

Abstract: A structure includes a substrate such as a wafer or an array of packages. The substrate has a front-side surface and a back-side surface. A reference feature such as a scribe grid is on the front-side surface. In at least one alignment mark is on the back-side surface, the alignment mark having a precise positional relationship to the reference feature on the front-side surface. The reference mark is used to cut the substrate from the back-side surface.

Abstract: A method includes identifying and determining a position of a scribe grid on a front-side surface of a wafer with a camera. Based on this information, a laser is fired to form an alignment mark on the back-side surface of the wafer. Advantageously, the alignment mark is positioned with respect to the scribe grid to within tight tolerance. The wafer is then cut from the backside surface using the alignment mark as a reference. Of importance, the wafer is cut from the back-side surface thus protecting the front-side surface of the wafer. Of further importance, the wafer is precisely cut such that the scribe line is not fabricated with the extra large width of scribe lines of conventional wafers designed to be cut from the back-side surface.