Patents by Inventor Gary Wayne Hancock

Gary Wayne Hancock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6405160
    Abstract: A compilier methodology including a stand alone memory interface which provides a user specified memory device of a required number of words of memory of a required bits per word. The stand alone memory interface is a tool to provide a menu showing multiple ways in which the user's request can be physically configured by varying the number of rows of memory, the number of blocks of memory, and the column multiplexing factor of the memory array. From this menu the user selects the memory configuration that best meets the user's requirements and is provided with either various models or representations (views) of the selected memory configuration or a GDS format data file. The views can be used to design large scale integrated circuits in which the memory device is embedded while the data file is used to generate photo mask for making the memory device as an integrated circuit.
    Type: Grant
    Filed: August 3, 1998
    Date of Patent: June 11, 2002
    Assignee: Motorola, Inc.
    Inventors: Gregory Djaja, James W. Nicholes, Douglas D. Smith, David William Knebelsberger, Gary Wayne Hancock