Patents by Inventor Gaurav Agrawal

Gaurav Agrawal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240141934
    Abstract: Mat locking pins include a pin body and a wheel housed within the pin body, the wheel configured to be movable from a first position to a second position, wherein in the first position the wheel is housed within the pin body and in the second position at least a portion of the wheel extends from the pin body. Mat systems include such mat locking pins to enable movement of the may system and/or secure two mats together.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Inventors: Gaurav Agrawal, Keith J. Murphy, Jared B. Howenstine
  • Patent number: 11954000
    Abstract: A file system in a user space partition of virtual memory may be mounted by a computing device that runs a virtual machine which includes a set of storage disks. The file system in user space may then expose one or more virtual files associated with one or more storage disks that correspond to one or more loop devices configured to map files of the virtual machine to the one or more virtual files. The computing device may then receive a request to read a data block stored at the virtual machine and may identify a file and corresponding virtual file that stores the requested data block based on a set of metadata provided by the loop devices. The computing device may then determine the location of the data block stored at the virtual machine, and may read the data block from the determined location.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: April 9, 2024
    Assignee: Rubrik, Inc.
    Inventors: Anuj Mittal, Dhananjay Mantri, Shivanshu Agrawal, Gaurav Maheshwari
  • Patent number: 11938184
    Abstract: In alternative embodiments, the invention provides a “triple combination” therapy for treating, ameliorating and preventing Crohn's Disease (or Crohn syndrome, terminal or distal ileitis or regional enteritis) or related disorders and conditions in mammals, such as paratuberculosis in mammals, or Johne's disease, including genetically-predisposed and chronic disorders, where the microbial or bacterial flora of the bowel is at least one causative or symptom-producing factor; and compositions for practicing same. In alternative embodiments, methods and compositions of the invention comprise or comprise use of therapies, medications, formulations and pharmaceuticals comprising active agents that can suppress or eradicate the microbiota super-infection that causes Crohn's Disease or paratuberculosis infection in mammals.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: March 26, 2024
    Inventor: Gaurav Agrawal
  • Publication number: 20240088879
    Abstract: A multiphase digital frequency synthesizer including a multiphase ring oscillator that provides phased clock signals, a clock divider that divides a phased clock signal by an integer value and a carry value to provide a divided clock signal, positive select circuitry that determines and updates a positive select value with accumulation and a modulo function based on a fractional division factor updated with successive cycles of the divided clock signal, carry circuitry that determines the carry value based on a number of the phased clock signals, positive multiplex circuitry that selects from among the phased clock signal using the positive select value for providing a positive multiplexed clock signal, and fractional phase addition circuitry that provides a first output clock signal based on a selected phased clock signal, the divided clock signal, and the positive multiplexed clock signal. Similar negative select circuitry and duty cycle correction circuitry may be included.
    Type: Application
    Filed: April 6, 2023
    Publication date: March 14, 2024
    Inventors: Ravi Kumar, Gaurav Agrawal, Deependra Kumar Jain, Krishna Thakur
  • Patent number: 11913179
    Abstract: Apparatus and methods related to mats and connects are described. The apparatus include a mat having a top side, a bottom side, and an interior defined between the top side and the bottom side, and at least one connector post extending within the interior of the mat, wherein the at least one connector post comprises a connector pin cavity extending within the interior of the mat and configured to receive a connector pin and at least one locking structure configured to engage with a portion of the connector pin and secure the connector pin to the at least one connector post.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: February 27, 2024
    Assignee: NEWPARK MATS & INTEGRATED SERVICES LLC
    Inventors: Saad Aziz, Gaurav Agrawal
  • Publication number: 20240061827
    Abstract: In some embodiments, systems, methods, and apparatuses are provided herein useful for managing a plurality of concurrent and nearly concurrent data requests within a computer system. The systems have a main data storage for storing source data, and a high speed, and/or remote data storage for storing computed data. In some embodiments, a combination of data filters and distributed mutex processes are used to eliminate or limit duplicate reads and writes into the high speed data storage units by ensuring only a single service module gets a lock to do the read and update of the cache; and makes it possible for keys to expire and be removed from the data filter. The systems and methods herein have various applications including retail sales environments where the requested data is related to product sales, product availability and the like.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 22, 2024
    Inventors: Gaurav Agrawal, Mingfeng Gong, Deiva Saranya Mandadi, Sandeep Singh, Tuo Shi
  • Publication number: 20230415709
    Abstract: Methods of manufacturing mats for use as support surfaces include mixing pre-used material with virgin material to form a blended material and forming the mat for use as a support surface from the blended material. Mats for use as support surfaces include a body having a composition of at least 30% by weight of pre-used material and the remainder being virgin material.
    Type: Application
    Filed: June 24, 2022
    Publication date: December 28, 2023
    Inventors: Dane Manuel, Gaurav Agrawal
  • Patent number: 11841843
    Abstract: In some embodiments, systems, methods, and apparatuses are provided herein useful for managing a plurality of concurrent and nearly concurrent data requests within a computer system. The systems have a main data storage for storing source data, and a high speed, and/or remote data storage for storing computed data. In some embodiments, a combination of data filters and distributed mutex processes are used to eliminate or limit duplicate reads and writes into the high speed data storage units by ensuring only a single service module gets a lock to do the read and update of the cache; and makes it possible for keys to expire and be removed from the data filter. The systems and methods herein have various applications including retail sales environments where the requested data is related to product sales, product availability and the like.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: December 12, 2023
    Assignee: Walmart Apollo, LLC
    Inventors: Gaurav Agrawal, Mingfeng Gong, Deiva Saranya Mandadi, Sandeep Singh, Tuo Shi
  • Publication number: 20230364675
    Abstract: Polycrystalline compacts include a polycrystalline superabrasive material comprising a first plurality of grains of superabrasive material having a first average grain size and a second plurality of grains of superabrasive material having a second average grain size smaller than the first average grain size. The first plurality of grains is dispersed within a substantially continuous matrix of the second plurality of grains. Earth-boring tools may include a body and at least one polycrystalline compact attached thereto. Methods of forming polycrystalline compacts may include coating relatively larger grains of superabrasive material with relatively smaller grains of superabrasive material, forming a green structure comprising the coated grains, and sintering the green structure. Other methods include mixing diamond grains with a catalyst and subjecting the mixture to a pressure greater than about five gigapascals (5.0 GPa) and a temperature greater than about 1,300° C.
    Type: Application
    Filed: May 17, 2023
    Publication date: November 16, 2023
    Inventors: Danny E. Scott, Anthony A. DiGiovanni, Gaurav Agrawal, Soma Chakraborty
  • Publication number: 20230334284
    Abstract: Embodiments of the present disclosure include systems and methods for sparsifying vectors for neural network models based on overlapping windows. A window is used to select a first set of elements in a vector of elements. A first element is selected from the first set of elements having the highest absolute value. The window is slid along the vector by a defined number of elements. The window is used to select a second set of elements in the vector, wherein the first set of elements and the second set of elements share at least one common element. A second element is selected from the second set of elements having the highest absolute value.
    Type: Application
    Filed: May 27, 2022
    Publication date: October 19, 2023
    Inventors: Girish Vishnu VARATKAR, Ankit MORE, Bita DARVISH ROUHANI, Mattheus C. HEDDES, Gaurav AGRAWAL
  • Patent number: 11782821
    Abstract: The disclosed computer-implemented method may include accessing updated data structures that are to be included in a user interface functionality test, where the updated data structures contribute to a user interface. The method may also include accessing live or snapshotted data captured from services running in a production environment, initiating generation of a first user interface instance using the updated data structures and using the accessed live or snapshotted data, and initiating generation of a second user interface instance using a different version of the data structures and using the same accessed live or snapshotted data. The method further includes comparing the first user interface instance to the second user interface instance to identify differences and then determine which outcome-defining effects the updated data structures had on the user interface based on the identified differences between the user interfaces.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: October 10, 2023
    Assignee: Netflix, Inc.
    Inventors: David Gevorkyan, Mehmet Yilmaz, Ajinkya More, Justin Derrick Basilico, Prasanna Padmanabhan, Vivek Kaushal, Gaurav Agrawal, Richard Wellington
  • Patent number: 11784651
    Abstract: An oscillator provides a plurality of clock signals, including a first clock signal having a first frequency and a first period, wherein each clock signal has the first frequency and is phase shifted from the first clock signal by an integer times a predetermined fractional amount of the first period. A multiphase frequency divider receives the plurality of clock signals and provides a divided clock output, and includes an integer frequency divider which provides the divided clock output based on a modified clock input and a clock selector which provides a current clock as the modified clock input during a first portion of the divided clock output and a next clock as the modified clock input during a subsequent portion of the divided clock output. The next clock is selected from the plurality of clock signals based on a selected fractional phase shift amount indicated by a sigma-delta modulator.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: October 10, 2023
    Assignee: NXP B.V.
    Inventors: Ravichandar Reddy Geetla, Deependra Kumar Jain, Gaurav Agrawal, Ravi Kumar
  • Publication number: 20230311444
    Abstract: Mats and panels of mats and methods of making the same are described. The panels include a first portion defined by a first material and a second portion defined by a second material. The first material and the second material have at least one of different compositions and different material properties. The methods include depositing a first material into a mold of a panel, depositing a second material into the mold of the panel after deposition of the first material, and applying at least one of pressure and heat to the mold of the panel to form a panel having the first material and the second material having at least one different compositions and different material properties.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 5, 2023
    Inventors: Dane Manuel, Jingxing Feng, Gaurav Agrawal
  • Publication number: 20230309728
    Abstract: Mats and methods of making the same are described. The mats include a main body defined by a plurality of sidewalls and two exterior surface walls opposing each other, a lip structure extending outwardly from the plurality of sidewalk around a portion of a periphery of the main body, and at least one fiber-reinforcement layer arranged between the two exterior surface walls of the mat. The methods include depositing a first deposition layer of material within a mold, positioning at least one fiber-reinforcement layer on the first deposition layer, depositing a second deposition layer of material within the mold over the at least one fiber-reinforcement layer and the first deposition layer, and treating the first deposition layer, the at least one fiber-reinforcement layer, and the second deposition layer to form a mat.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Inventors: Gaurav Agrawal, Dane Manuel
  • Patent number: 11773309
    Abstract: A method of improving rheological properties of a divalent brine based downhole treatment fluid at an elevated temperature comprises adding to the divalent brine based downhole treatment fluid a rheological modifier, which comprises a carboxylic acid ester, or a phosphate ester blended with an ethoxylated glycol, or a combination comprising at least one of the foregoing in an amount effective to improve the rheological properties of the divalent brine based downhole treatment fluid at a temperature of greater than about 200° F. The divalent brine based downhole treatment fluid comprises calcium bromide, calcium chloride, zinc bromide, zinc chloride, or a combination comprising at least one of the foregoing.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: October 3, 2023
    Assignee: BAKER HUGHES HOLDINGS LLC
    Inventors: Prahlad Yadav, Mohammed Al-Rabah, Gaurav Agrawal
  • Patent number: 11712869
    Abstract: Mats and panels of mats and methods of making the same are described. The panels include a first portion defined by a first material and a second portion defined by a second material. The first material and the second material have at least one of different compositions and different material properties. The methods include depositing a first material into a mold of a panel, depositing a second material into the mold of the panel after deposition of the first material, and applying at least one of pressure and heat to the mold of the panel to form a panel having the first material and the second material having at least one different compositions and different material properties.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: August 1, 2023
    Assignee: NEWPARK MATS & INTEGRATED SERVICES LLC
    Inventors: Dane Manuel, Jingxing Feng, Gaurav Agrawal
  • Publication number: 20230126891
    Abstract: An oscillator provides a plurality of clock signals, including a first clock signal having a first frequency and a first period, wherein each clock signal has the first frequency and is phase shifted from the first clock signal by an integer times a predetermined fractional amount of the first period. A multiphase frequency divider receives the plurality of clock signals and provides a divided clock output, and includes an integer frequency divider which provides the divided clock output based on a modified clock input and a clock selector which provides a current clock as the modified clock input during a first portion of the divided clock output and a next clock as the modified clock input during a subsequent portion of the divided clock output. The next clock is selected from the plurality of clock signals based on a selected fractional phase shift amount indicated by a sigma-delta modulator.
    Type: Application
    Filed: October 27, 2021
    Publication date: April 27, 2023
    Inventors: Ravichandar Reddy Geetla, Deependra Kumar Jain, Gaurav Agrawal, Ravi Kumar
  • Publication number: 20230119235
    Abstract: A method and system for controlling performance of a workload partitioned among a plurality of accelerator chips of a multi-chip system. One or more processors may receive performance speed data for each of the accelerator chips, obtain a model of the partitioned workload, determine a portion of the workload that is either overworked or underworked based on the model of the partitioned workload and the performance speed data for each of the plurality of accelerator chips, and adjust a performance speed of an accelerator chip that performs the portion of the partitioned workload that is either overworked or underworked.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 20, 2023
    Inventors: Michael David Hutton, Georgios Konstadinidis, Lluis-Miquel Munguia, Safeen Huda, Gaurav Agrawal
  • Patent number: 11601130
    Abstract: An initialization circuit of a delay locked loop (DLL) includes a sense circuit and a control circuit. The sense circuit receives an enable signal, a reference clock signal, and various delayed reference clock signals, and outputs another enable signal. The control circuit receives the two enable signals and outputs and provides a control signal to a loop filter of the DLL to control a delay value associated with the DLL. The control signal is provided to the loop filter such that the delay value associated with the DLL equals a predetermined delay value for a predetermined time duration. Further, after a lapse of the predetermined time duration, the delay value associated with the DLL increases until a difference between a time period of the reference clock signal and the delay value equals a threshold value.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: March 7, 2023
    Assignee: NXP B.V.
    Inventors: Gaurav Agrawal, Deependra Kumar Jain, Krishna Thakur
  • Publication number: 20220416796
    Abstract: An initialization circuit of a delay locked loop (DLL) includes a sense circuit and a control circuit. The sense circuit receives an enable signal, a reference clock signal, and various delayed reference clock signals, and outputs another enable signal. The control circuit receives the two enable signals and outputs and provides a control signal to a loop filter of the DLL to control a delay value associated with the DLL. The control signal is provided to the loop filter such that the delay value associated with the DLL equals a predetermined delay value for a predetermined time duration. Further, after a lapse of the predetermined time duration, the delay value associated with the DLL increases until a difference between a time period of the reference clock signal and the delay value equals a threshold value.
    Type: Application
    Filed: June 23, 2021
    Publication date: December 29, 2022
    Inventors: Gaurav Agrawal, Deependra Kumar Jain, Krishna Thakur