Abstract: The present invention provides a planar clean method applicable to shallow trench isolation (STI) for cleaning a substrate having a STI region formed thereon and a high density plasma (HDP) oxide on the surface of the STI region. A buffer oxide etch cleaning solution is exploited and matched by a planar clean way to let the oxide losses of the surface of the silicon substrate and the STI corners match the height and shape of the HDP oxide in the STI region. Thereby, the phenomenon of wrap rounding at the STI corners, which influences growth of the next thermal oxide, can be avoided. The present invention can prevent the STI corners from generating parasitic device characteristics and enhance electric characteristics of the device.

Abstract: A method of forming a shallow trench isolation (STI) structure is disclosed. Instead of using a conventional chemical mechanical polishing (CMP), a wet etching is used in the present invention while forming a shallow trench isolation structure. By using the high selectivity of the wet etching, the thickness of the silicon nitride (Si3N4) layer and the oxide layer in the shallow trench isolation structure can be decreased or controlled, and the micro-scratch caused by the chemical mechanical polishing can be avoided.