Patents by Inventor Gen Okazaki

Gen Okazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9129875
    Abstract: In a pixel unit of a solid-state imaging device, a semiconductor substrate is provided with a plurality of photodiodes, a first insulating film includes a recess in a portion above each of the photodiodes, a second insulating film embeds the recess, a plurality of color filters is formed on the second insulating film, the color filters each corresponding to one of the photodiodes, a partition is provided between adjacent ones of the color filters, the partition being a part of a third insulating film, and in an area outside of the pixel unit, (i) a conductive film at least partially covered by the third insulating film is formed on the second insulating film, and (ii) the third insulating film formed on the conductive film and on the second insulating film near the conductive film has a film thickness smaller than a film thickness of the partition.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: September 8, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hisashi Yano, Shigeru Suzuki, Gen Okazaki, Akira Oodaira, Motonari Katsuno, Tetsuya Nakamura
  • Publication number: 20140210033
    Abstract: In a pixel unit of a solid-state imaging device, a semiconductor substrate is provided with a plurality of photodiodes, a first insulating film includes a recess in a portion above each of the photodiodes, a second insulating film embeds the recess, a plurality of color filters is formed on the second insulating film, the color filters each corresponding to one of the photodiodes, a partition is provided between adjacent ones of the color filters, the partition being a part of a third insulating film, and in an area outside of the pixel unit, (i) a conductive film at least partially covered by the third insulating film is formed on the second insulating film, and (ii) the third insulating film formed on the conductive film and on the second insulating film near the conductive film has a film thickness smaller than a film thickness of the partition.
    Type: Application
    Filed: April 3, 2014
    Publication date: July 31, 2014
    Applicant: Panasonic Corporation
    Inventors: Hisashi YANO, Shigeru SUZUKI, Gen OKAZAKI, Akira OODAIRA, Motonari KATSUNO, Tetsuya NAKAMURA
  • Patent number: 8587076
    Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: November 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Junji Hirase, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida, Shinji Takeoka
  • Publication number: 20120273903
    Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.
    Type: Application
    Filed: July 12, 2012
    Publication date: November 1, 2012
    Applicant: Panasonic Corporation
    Inventors: Junji Hirase, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida, Shinji Takeoka
  • Patent number: 8253180
    Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: August 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Junji Hirase, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida, Shinji Takeoka
  • Publication number: 20110147857
    Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.
    Type: Application
    Filed: March 1, 2011
    Publication date: June 23, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Junji HIRASE, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida, Shinji Takeoka
  • Patent number: 7923764
    Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: April 12, 2011
    Assignee: Panasonic Corporation
    Inventors: Junji Hirase, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida, Shinji Takeoka
  • Patent number: 7825482
    Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; a first active region and a second active region surrounded by the isolation region; an n-type gate electrode and a p-type gate electrode formed on gate insulating films; an insulating film and a silicon region formed on the isolation region and isolating the n-type gate electrode and the p-type gate electrode from each other; and a metal silicide film formed on the upper surfaces of the n-type gate electrode, the silicon region, the p-type gate electrode, and part of the insulating film formed therebetween. The n-type gate electrode is electrically connected to the p-type gate electrode through the metal silicide film.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: November 2, 2010
    Assignee: Panasonic Corporation
    Inventors: Gen Okazaki, Akio Sebe
  • Patent number: 7732839
    Abstract: A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is smaller than a height of an upper edge of each of the insulating sidewalls. A thickness of first part of the stress film located on the gate electrode portion is larger than a thickness of second part of the stress film located on the source/drain regions.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: June 8, 2010
    Assignee: Panasonic Corporation
    Inventors: Akio Sebe, Naoki Kotani, Shinji Takeoka, Gen Okazaki, Junji Hirase, Kazuhiko Aida
  • Patent number: 7646065
    Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region in the semiconductor substrate; a gate insulating film formed on the active region; and a gate electrode formed across the boundary between the active region and the isolation region adjacent to the active region. The gate electrode includes a first portion which is located above the active region with the gate insulating film interposed therebetween and is entirely made of a silicide in a thickness direction and a second portion which is located above the isolation region and is made of a silicon region and the silicide region covering the silicon region.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: January 12, 2010
    Assignee: Panasonic Corporation
    Inventors: Naoki Kotani, Gen Okazaki, Shinji Takeoka, Junji Hirase, Akio Sebe, Kazuhiko Aida
  • Publication number: 20090278210
    Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.
    Type: Application
    Filed: July 20, 2009
    Publication date: November 12, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Junji HIRASE, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida, Shinji Takeoka
  • Patent number: 7616259
    Abstract: A video camera, building in a hard disk drive and an optical disk drive within the same housing, for dissolving a problem of increasing the temperature of hard disk drive due to heats generated within an inside of the main body thereof, comprises: an image pickup portion, which is configured to make photographing; a display portion 6, which is configured to display an image photographed; a hard disk drive 1 which is configured to record the image photographed therein; and an optical disk drive 9, which is configured to drive an optical disk being attached/detached, wherein the display portion 6, the optical disk drive 1, the hard disk 9 are disposed in that order, and the hard disk drive 1 is disposed on a cover portion to be opened when taking out the optical disk from the optical disk drive 9.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: November 10, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Ishikuro, Gen Okazaki
  • Patent number: 7579227
    Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: August 25, 2009
    Assignee: Panasonic Corporation
    Inventors: Junji Hirase, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida, Shinji Takeoka
  • Publication number: 20080290415
    Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; a first active region and a second active region surrounded by the isolation region; an n-type gate electrode and a p-type gate electrode formed on gate insulating films; an insulating film and a silicon region formed on the isolation region and isolating the n-type gate electrode and the p-type gate electrode from each other; and a metal silicide film formed on the upper surfaces of the n-type gate electrode, the silicon region, the p-type gate electrode, and part of the insulating film formed therebetween. The n-type gate electrode is electrically connected to the p-type gate electrode through the metal silicide film.
    Type: Application
    Filed: January 4, 2008
    Publication date: November 27, 2008
    Inventors: Gen OKAZAKI, Akio SEBE
  • Patent number: 7456448
    Abstract: A semiconductor device, including a first MIS-type transistor formed in a first region of a semiconductor region, the first region being of a first conductivity type, the first MIS-type transistor including: a first gate insulating film formed on the first region; a first gate electrode formed on the first gate insulating film; a first extension diffusion layer of a second conductivity type formed in a region of the first region under and beside the first gate electrode; and a first fluorine diffusion layer formed in a first channel region of the first conductivity type sandwiched between portions of the first extension diffusion layer, wherein portions of the first fluorine diffusion layer extend from the first extension diffusion layer and overlap together in a region directly under the first gate electrode.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: November 25, 2008
    Assignee: Panasonic Corporation
    Inventors: Naoki Kotani, Akio Sebe, Gen Okazaki, Tokuhiko Tamaki
  • Publication number: 20080131097
    Abstract: A video camera, installing a hard disc and an optical disc therein, as recording media for recording video information thereon, wherein: a housing of the video camera is conducted with a main body housing, and a recording media cover, which can be freely rotated to the main body housing, to be opened/closed; the recording media cover is so structured to be fitted and engaged with, by sliding a hard disc cover to an optical disc cover, by means of an engagement member; the optical disc is loaded detachably within the main body housing of the video camera, by rotationally opening/closing the recording media cover; and the hard disc is disposed in an interior space defined by the optical disc cover and the hard disc cover, under such condition that engagement condition of the recording media cover by means of the engagement member can be removed by only a specific removal member, from an outside thereof.
    Type: Application
    Filed: November 2, 2007
    Publication date: June 5, 2008
    Applicant: Hitachi, Ltd
    Inventor: Gen Okazaki
  • Publication number: 20070285517
    Abstract: A video camera, building in a hard disk drive and an optical disk drive within the same housing, for dissolving a problem of increasing the temperature of hard disk drive due to heats generated within an inside of the main body thereof, comprises: an image pickup portion, which is configured to make photographing; a display portion 6, which is configured to display an image photographed; a hard disk drive 1 which is configured to record the image photographed therein; and an optical disk drive 9, which is configured to drive an optical disk being attached/detached, wherein the display portion 6, the optical disk drive 1, the hard disk 9 are disposed in that order, and the hard disk drive 1 is disposed on a cover portion to be opened when taking out the optical disk from the optical disk drive 9.
    Type: Application
    Filed: January 26, 2007
    Publication date: December 13, 2007
    Inventors: Shinichi Ishikuro, Gen Okazaki
  • Publication number: 20070200185
    Abstract: A high dielectric constant gate insulating film is formed on an active region of a substrate, and a gate electrode is formed on the high dielectric constant gate insulating film. A high dielectric constant insulating sidewall is formed on a side face of the gate electrode.
    Type: Application
    Filed: October 6, 2006
    Publication date: August 30, 2007
    Inventors: Junji Hirase, Naoki Kotani, Shinji Takeoka, Gen Okazaki, Akio Sebe, Kazuhiko Aida
  • Publication number: 20070173023
    Abstract: After gate insulating film formation films are formed in an element formation region of a semiconductor substrate, a gate electrode formation film is formed on the gate insulating film formation films. A fluorine-containing insulting film is formed on the gate electrode formation film. Then, thermal treatment is performed to diffuse and introduce the fluorine contained in the fluorine-containing insulating film to interfaces between the semiconductor substrate and the gate insulting film formation films.
    Type: Application
    Filed: October 2, 2006
    Publication date: July 26, 2007
    Inventors: Gen Okazaki, Naoki Kotani, Tokuhiko Tamaki, Akio Sebe
  • Publication number: 20070134898
    Abstract: After a Ni film is deposited on a substrate on which a gate silicon layer is formed, a mask is formed above the gate silicon layer. Then, the Ni film is etched so as to leave a part of the Ni film which is located on the gate silicon layer. This restricts sideways supply of Ni present on the sides of the gate silicon layer. Thereafter, thermal treatment is performed to silicidate the gate silicon layer entirely.
    Type: Application
    Filed: October 16, 2006
    Publication date: June 14, 2007
    Inventors: Shinji Takeoka, Junji Hirase, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida