Patents by Inventor Gen Watari

Gen Watari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220312589
    Abstract: A memory system includes a substrate having a first and second surface, a memory controller, a nonvolatile memory, a first and second part, first and first, second, third, and fourth electrodes. The substrate includes a core portion, first and second pads on the first surface, and third and fourth pads on the second surface. The first electrodes couples the first pads and the memory controller. The second electrodes couples the second pads and the nonvolatile memory. The third electrodes couples the third pads and the first part. The fourth electrodes couples the fourth pads and the second part. The first and third pads are arranged at positions symmetrical to each other with respect to the core portion. The second and fourth pads are arranged at positions symmetrical to each other with respect to the core portion.
    Type: Application
    Filed: September 10, 2021
    Publication date: September 29, 2022
    Applicant: Kioxia Corporation
    Inventor: Gen WATARI
  • Patent number: 10276517
    Abstract: A semiconductor device includes a mounting substrate including an interface, which is connectable with a host, and a first ground layer, a surface-mounted component mounted on the mounting substrate, and a plurality of solder balls between the mounting substrate and the surface-mounted component. The surface-mounted component includes a semiconductor chip, a package substrate that is positioned between the semiconductor chip and the solder balls and includes a second ground layer, a sealing portion that covers the semiconductor chip, and has an opening, a first conductive portion on a top surface of the sealing portion, and a second conductive portion on a side surface of the opening and electrically connected to the first conductive portion and the second ground layer. The second ground layer is electrically connected to the first ground layer through one of the solder balls.
    Type: Grant
    Filed: September 4, 2017
    Date of Patent: April 30, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Gen Watari, Masato Sugita
  • Publication number: 20180277498
    Abstract: A semiconductor device includes a mounting substrate including an interface, which is connectable with a host, and a first ground layer, a surface-mounted component mounted on the mounting substrate, and a plurality of solder balls between the mounting substrate and the surface-mounted component. The surface-mounted component includes a semiconductor chip, a package substrate that is positioned between the semiconductor chip and the solder balls and includes a second ground layer, a sealing portion that covers the semiconductor chip, and has an opening, a first conductive portion on a top surface of the sealing portion, and a second conductive portion on a side surface of the opening and electrically connected to the first conductive portion and the second ground layer. The second ground layer is electrically connected to the first ground layer through one of the solder balls.
    Type: Application
    Filed: September 4, 2017
    Publication date: September 27, 2018
    Inventors: Gen WATARI, Masato SUGITA
  • Patent number: 9496471
    Abstract: A semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first interconnection section, a second interconnection section, and a varistor film. The semiconductor layer includes a light emitting layer. The first electrode is provided in a emitting region on the second surface. The second electrode is provided in a non-emitting region on the second surface. The first interconnection section is provided on the first electrode and electrically connected to the first electrode. The second interconnection section is provided on the second electrode and on the first electrode and electrically connected to the second electrode. The varistor film is provided in contact with the first electrode and the second interconnection section between the first electrode and the second interconnection section.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: November 15, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Akimoto, Yoshiaki Sugizaki, Hideyuki Tomizawa, Masanobu Ando, Akihiro Kojima, Gen Watari, Naoya Ushiyama, Tetsuro Komatsu, Miyoko Shimada, Hideto Furuyama
  • Patent number: 9240531
    Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting layer, a pair of electrodes, a fluorescent material layer and a chromaticity adjusting layer. The semiconductor light-emitting layer emits first light. The pair of electrodes is connected to the semiconductor light-emitting layer. The fluorescent material layer covers at least a center portion of the semiconductor light-emitting layer, and contains a fluorescent material to absorb the first light and radiate second light. The chromaticity adjusting layer covers at least a peripheral portion of the semiconductor light-emitting layer, is exposed to outside, and contains a fluorescent material with a concentration lower than a concentration of the fluorescent material in the fluorescent material layer.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: January 19, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoya Ushiyama, Gen Watari, Masanobu Ando, Tetsuro Komatsu
  • Publication number: 20150364664
    Abstract: A semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first interconnection section, a second interconnection section, and a varistor film. The semiconductor layer includes a light emitting layer. The first electrode is provided in a emitting region on the second surface. The second electrode is provided in a non-emitting region on the second surface. The first interconnection section is provided on the first electrode and electrically connected to the first electrode. The second interconnection section is provided on the second electrode and on the first electrode and electrically connected to the second electrode. The varistor film is provided in contact with the first electrode and the second interconnection section between the first electrode and the second interconnection section.
    Type: Application
    Filed: August 10, 2015
    Publication date: December 17, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke AKIMOTO, Yoshiaki SUGIZAKI, Hideyuki TOMIZAWA, Masanobu ANDO, Akihiro KOJIMA, Gen WATARI, Naoya USHIYAMA, Tetsuro KOMATSU, Miyoko SHIMADA, Hideto FURUYAMA
  • Patent number: 9136439
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first interconnection section, a second interconnection section, and a varistor film. The semiconductor layer includes a light emitting layer. The first electrode is provided in a emitting region on the second surface. The second electrode is provided in a non-emitting region on the second surface. The first interconnection section is provided on the first electrode and electrically connected to the first electrode. The second interconnection section is provided on the second electrode and on the first electrode and electrically connected to the second electrode. The varistor film is provided in contact with the first electrode and the second interconnection section between the first electrode and the second interconnection section.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: September 15, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Akimoto, Yoshiaki Sugizaki, Hideyuki Tomizawa, Masanobu Ando, Akihiro Kojima, Gen Watari, Naoya Ushiyama, Tetsuro Komatsu, Miyoko Shimada, Hideto Furuyama
  • Publication number: 20150115306
    Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting layer, a pair of electrodes, a fluorescent material layer and a chromaticity adjusting layer. The semiconductor light-emitting layer emits first light. The pair of electrodes is connected to the semiconductor light-emitting layer. The fluorescent material layer covers at least a center portion of the semiconductor light-emitting layer, and contains a fluorescent material to absorb the first light and radiate second light. The chromaticity adjusting layer covers at least a peripheral portion of the semiconductor light-emitting layer, is exposed to outside, and contains a fluorescent material with a concentration lower than a concentration of the fluorescent material in the fluorescent material layer.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 30, 2015
    Inventors: Naoya USHIYAMA, Gen WATARI, Masanobu ANDO, Tetsuro KOMATSU
  • Patent number: 8952409
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a semiconductor light-emitting layer, a pair of electrodes, a fluorescent material layer and a chromaticity adjusting layer. The semiconductor light-emitting layer emits first light. The pair of electrodes is connected to the semiconductor light-emitting layer. The fluorescent material layer covers at least a center portion of the semiconductor light-emitting layer, and contains a fluorescent material to absorb the first light and radiate second light. The chromaticity adjusting layer covers at least a peripheral portion of the semiconductor light-emitting layer, is exposed to outside, and contains a fluorescent material with a concentration lower than a concentration of the fluorescent material in the fluorescent material layer.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: February 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoya Ushiyama, Gen Watari, Masanobu Ando, Tetsuro Komatsu
  • Patent number: 8686464
    Abstract: According to one embodiment, an LED module includes a substrate, an interconnect layer, a light emitting diode (LED) package, and a reflection member. The interconnect layer is provided on the substrate. The LED package is mounted on the interconnect layer. The reflection member is provided on a region in the substrate where the LED package is not mounted and has a property of reflecting light emitted from the LED package. The LED package includes a first lead frame, a second lead frame, an LED chip, and a resin body. The first lead frame and the second lead frame are arranged apart from each other on the same plane. The LED chip is provided above the first lead frame and the second lead frame, with one terminal connected to the first lead frame and one other terminal connected to the second lead frame.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: April 1, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Inoue, Kazuhisa Iwashita, Teruo Takeuchi, Gen Watari, Tetsuro Komatsu, Tatsuo Tonedachi
  • Publication number: 20140070248
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a semiconductor light-emitting layer, a pair of electrodes, a fluorescent material layer and a chromaticity adjusting layer. The semiconductor light-emitting layer emits first light. The pair of electrodes is connected to the semiconductor light-emitting layer. The fluorescent material layer covers at least a center portion of the semiconductor light-emitting layer, and contains a fluorescent material to absorb the first light and radiate second light. The chromaticity adjusting layer covers at least a peripheral portion of the semiconductor light-emitting layer, is exposed to outside, and contains a fluorescent material with a concentration lower than a concentration of the fluorescent material in the fluorescent material layer.
    Type: Application
    Filed: February 27, 2013
    Publication date: March 13, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoya USHIYAMA, Gen WATARI, Masanobu ANDO, Tetsuro KOMATSU
  • Publication number: 20140042450
    Abstract: A semiconductor device is provided that includes a semiconductor layer and an electrode coupled to a semiconductor layer. The electrode includes first and second end portions, the first end portion being closer to the semiconductor layer than the second end portion. The first end portion is formed to have crystals of a first grain size, and the second end portion is formed to have crystals of a second grain size that is larger than the first grain size.
    Type: Application
    Filed: March 4, 2013
    Publication date: February 13, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro AKIYAMA, Masanobu Ando, Gen Watari, Naoya Ushiyama, Shuji Itonaga
  • Publication number: 20130313590
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first interconnection section, a second interconnection section, and a varistor film. The semiconductor layer includes a light emitting layer. The first electrode is provided in a emitting region on the second surface. The second electrode is provided in a non-emitting region on the second surface. The first interconnection section is provided on the first electrode and electrically connected to the first electrode. The second interconnection section is provided on the second electrode and on the first electrode and electrically connected to the second electrode. The varistor film is provided in contact with the first electrode and the second interconnection section between the first electrode and the second interconnection section.
    Type: Application
    Filed: February 28, 2013
    Publication date: November 28, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke AKIMOTO, Yoshiaki SUGIZAKI, Hideyuki TOMIZAWA, Masanobu ANDO, Akihiro KOJIMA, Gen WATARI, Naoya USHIYAMA, Tetsuro KOMATSU, Miyoko SHIMADA, Hideto FURUYAMA
  • Patent number: 8564109
    Abstract: According to one embodiment, an illumination apparatus includes an LED (Light Emitting Diode) module, a light guide plate, and a support body. The support body supports the LED module and the light guide plate. A reflective surface of the support body is provided between a portion supporting the LED module and a portion supporting the light guide plate. The reflective surface is reflective with respect to the light emitted from the LED package. The LED module is tilted relative to the reflective surface with the LED package mounting surface being toward the reflective surface. An angle between the LED module and the reflective surface is less than 90°.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: October 22, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Gen Watari, Kazuhiro Inoue
  • Publication number: 20130234181
    Abstract: A semiconductor light-emitting device includes first and second lead frames that are arranged with a separation on a common plane, a semiconductor light-emitting element that is electrically connected to the first and second lead frames, and a resin body that covers the first and second lead frames and the semiconductor light-emitting element, and includes fluorescent materials that absorb light emitted from the semiconductor light-emitting element and emit light with a wavelength longer than the wavelength of the light absorbed. The resin body has a shape that becomes smaller in cross-section with increasing distance from the common plane.
    Type: Application
    Filed: August 30, 2012
    Publication date: September 12, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Gen WATARI
  • Patent number: 8525202
    Abstract: According to one embodiment, an LED package includes first and second lead frames, an LED chip and a resin body. The first and second lead frames are apart from each other. The LED chip is provided above the first and second lead frames, and the LED chip has one terminal connected to the first lead frame and another terminal connected to the second lead frame. In addition, the resin body covers the first and second lead frames and the LED chip, and has an upper surface with a surface roughness of 0.15 ?m or higher and a side surface with a surface roughness higher than the surface roughness of the upper surface.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Gen Watari, Satoshi Shimizu, Mami Yamamoto, Hidenori Egoshi, Hiroaki Oshio, Tatsuo Tonedachi, Kazuhisa Iwashita, Tetsuro Komatsu, Teruo Takeuchi
  • Patent number: 8497521
    Abstract: According to one embodiment, an LED package includes a first lead frame, a second lead frame, an LED chip, a wire, and a resin body. The first lead frame and the second lead frame are arranged with a space between each other. The LED chip is provided above the first lead frame and the second lead frame. The LED chip has a first terminal connected to the first lead frame and a second terminal connected to the second lead frame. The wire connects the first terminal to the first lead frame. The resin body covers the LED chip as well as a top surface, a part of a bottom surface, and a part of an edge surface of each of the first lead frame and the second lead frame. A remaining portion of each of the bottom surfaces and a remaining portion of each of the edge surfaces are exposed.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: July 30, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoya Ushiyama, Kazuhisa Iwashita, Tatsuo Tonedachi, Teruo Takeuchi, Hiroaki Oshio, Tetsuro Komatsu, Gen Watari, Satoshi Shimizu
  • Patent number: 8378347
    Abstract: According to one embodiment, an LED package includes first and second lead frames spaced from each other, and an LED chip. Each of the first and second lead frames includes a base portion and a plurality of extending portions extending from the base portion. A part of a lower surface of the base portion, side surfaces of the base portion, lower surfaces of the extending portions and side surfaces of the extending portions are covered by resin. A remaining part of the lower surface of the base portion and tip surfaces of the extending portions are not covered by resin. The part of the lower surface of the base portion includes a first edge of the first lead frame and a second edge of the second lead frame. The first edge and the second edge are opposed each other.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: February 19, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Shimizu, Kazuhisa Iwashita, Teruo Takeguchi, Tetsuro Komatsu, Hiroaki Oshio, Tatsuo Tonedachi, Naoya Ushiyama, Kazuhiro Inoue, Gen Watari
  • Patent number: 8338845
    Abstract: According to one embodiment, an LED package includes first and second lead frames, an LED chip and a resin body. The first and second lead frames are made of a metal material, and disposed to be apart from each other. The LED chip is provided above the first and second lead frames, the LED chip having one terminal connected to the first lead frame and another terminal connected to the second lead frame. The resin body is made of a resin material having a shore D hardness of 25 or higher. In addition, the resin body covers the first and second lead frames and the LED chip. And, an appearance of the resin body is an appearance of the LED package.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: December 25, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Gen Watari, Satoshi Shimizu, Hiroaki Oshio, Tatsuo Tonedachi, Kazuhisa Iwashita, Tetsuro Komatsu, Teruo Takeuchi
  • Publication number: 20120132931
    Abstract: According to one embodiment, an LED module includes a substrate, an interconnect layer, a light emitting diode (LED) package, and a reflection member. The interconnect layer is provided on the substrate. The LED package is mounted on the interconnect layer. The reflection member is provided on a region in the substrate where the LED package is not mounted and has a property of reflecting light emitted from the LED package. The LED package includes a first lead frame, a second lead frame, an LED chip, and a resin body. The first lead frame and the second lead frame are arranged apart from each other on the same plane. The LED chip is provided above the first lead frame and the second lead frame, with one terminal connected to the first lead frame and one other terminal connected to the second lead frame.
    Type: Application
    Filed: March 22, 2011
    Publication date: May 31, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhiro Inoue, Kazuhisa Iwashita, Teruo Takeuchi, Gen Watari, Tetsuro Komatsu, Tatsuo Tonedachi