Patents by Inventor Gen Yamada

Gen Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9287854
    Abstract: A pulse stretching circuit having a pulse delay circuit for receiving an input pulse signal and for outputting a delay pulse signal, and a pulse adjustment circuit, connected to the pulse delay circuit, receiving the input pulse signal and the delay pulse signal and for outputting an output pulse signal having a pulse width longer than a pulse width of the input pulse signal. The pulse adjustment circuit causes a leading edge of the output pulse signal in response to a leading edge of the input pulse signal, keeps a state in which the output pulse signal is displaced with the leading edge thus caused longer than a total time of times for both pulse widths of the input pulse signal and the delay pulse signal, and causes a trailing edge of the output pulse signal in response to a trailing edge of the delay pulse signal.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: March 15, 2016
    Assignee: International Business Machines Corporation
    Inventors: Masatoshi Ishii, Hisatada Miyatake, Gen Yamada
  • Publication number: 20150349754
    Abstract: A pulse stretching circuit having a pulse delay circuit for receiving an input pulse signal and for outputting a delay pulse signal, and a pulse adjustment circuit, connected to the pulse delay circuit, receiving the input pulse signal and the delay pulse signal and for outputting an output pulse signal having a pulse width longer than a pulse width of the input pulse signal. The pulse adjustment circuit causes a leading edge of the output pulse signal in response to a leading edge of the input pulse signal, keeps a state in which the output pulse signal is displaced with the leading edge thus caused longer than a total time of times for both pulse widths of the input pulse signal and the delay pulse signal, and causes a trailing edge of the output pulse signal in response to a trailing edge of the delay pulse signal.
    Type: Application
    Filed: June 25, 2015
    Publication date: December 3, 2015
    Inventors: Masatoshi Ishii, Hisatada Miyatake, Gen Yamada
  • Patent number: 9130548
    Abstract: A pulse stretching circuit having a pulse delay circuit for receiving an input pulse signal and for outputting a delay pulse signal, and a pulse adjustment circuit, connected to the pulse delay circuit, receiving the input pulse signal and the delay pulse signal and for outputting an output pulse signal having a pulse width longer than a pulse width of the input pulse signal. The pulse adjustment circuit causes a leading edge of the output pulse signal in response to a leading edge of the input pulse signal, keeps a state in which the output pulse signal is displaced with the leading edge thus caused longer than a total time of times for both pulse widths of the input pulse signal and the delay pulse signal, and causes a trailing edge of the output pulse signal in response to a trailing edge of the delay pulse signal.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: September 8, 2015
    Assignee: International Business Machines Corporation
    Inventors: Masatoshi Ishii, Gen Yamada, Hisatada Miyatake
  • Patent number: 8803578
    Abstract: The pulse width adjusting circuit includes a pulse delaying circuit for inputting an inputted pulse signal a and for outputting a plurality of different delayed pulse signals b1, b2, . . . , a transmission gate for inputting an inputted pulse signal a and controlling the passage of the inputted pulse signal a in response to the application of two delayed pulse signals from among the plurality of different delayed pulse signals b1, b2, . . . , and a pulse width setting circuit connected to the transmission gate for setting the pulse width of an outputted pulse signal c generated on the basis of the inputted pulse signal a passing through the transmission gate.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: August 12, 2014
    Assignee: International Business Machines Corporation
    Inventors: Masatoshi Ishii, Gen Yamada, Hisatada Miyatake
  • Patent number: 7911049
    Abstract: An electrically optimized and structurally protected micro via structure for high speed signals in multilayer interconnection substrates is provided. The via structure eliminates the overlap of a contact with the reference planes to thereby reduce the via capacitance and thus, the via impedance mismatch in the via structure. As a result, the via structure is electrically optimized. The via structure further comprises one or more floating support members placed in close proximity to the via within a via clearance area between the via and the reference planes. The floating support members are “floating” in the sense that they are not in electrical contact with either the via or the reference planes. Thus, they are not provided for purposes of signal propagation but only for structural support. The floating support members may be connected to one another by way of one or more microvia structures.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: March 22, 2011
    Assignee: International Business Machines Corporation
    Inventors: Paul M. Harvey, Kazushige Kawasaki, Gen Yamada
  • Patent number: 7687391
    Abstract: An electrically optimized and structurally protected micro via structure for high speed signals in multilayer interconnection substrates is provided. The via structure eliminates the overlap of a contact with the reference planes to thereby reduce the via capacitance and thus, the via impedance mismatch in the via structure. As a result, the via structure is electrically optimized. The via structure further comprises one or more floating support members placed in close proximity to the via within a via clearance area between the via and the reference planes. The floating support members are “floating” in the sense that they are not in electrical contact with either the via or the reference planes. Thus, they are not provided for purposes of signal propagation but only for structural support. The floating support members may be connected to one another by way of one or more microvia structures.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: March 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Paul M. Harvey, Kazushige Kawasaki, Gen Yamada
  • Patent number: 7484679
    Abstract: A method of milling cerium compound by means of a ball mill using a milling medium, characterized in that ratio Hb/r of radius r of a cylindrical ball mill container and depth Hb of the milling medium in the ball mill container disposed horizontally ranges from 1.2 to 1.9, and the ball mill container is rotated at a rotational speed which is 50% or less of critical rotational speed Nc=299/r1/2 of the ball mill container converted from the radius r expressed in centimeter. The milling method can be carried out in a wet or dry process, and the cerium compound is preferably cerium oxide. The method can be also applied for producing a cerium compound slurry.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: February 3, 2009
    Assignee: Nissan Chemical Industries, Ltd.
    Inventors: Isao Ota, Kenji Tanimoto, Gen Yamada, Noriyuki Takakuma
  • Publication number: 20080272862
    Abstract: An electrically optimized and structurally protected micro via structure for high speed signals in multilayer interconnection substrates is provided. The via structure eliminates the overlap of a contact with the reference planes to thereby reduce the via capacitance and thus, the via impedance mismatch in the via structure. As a result, the via structure is electrically optimized. The via structure further comprises one or more floating support members placed in close proximity to the via within a via clearance area between the via and the reference planes. The floating support members are “floating” in the sense that they are not in electrical contact with either the via or the reference planes. Thus, they are not provided for purposes of signal propagation but only for structural support. The floating support members may be connected to one another by way of one or more microvia structures.
    Type: Application
    Filed: July 11, 2008
    Publication date: November 6, 2008
    Applicant: International Business Machines Corporation
    Inventors: Paul M. Harvey, Kazushige Kawasaki, Gen Yamada
  • Publication number: 20080156908
    Abstract: A method of milling cerium compound by means of a ball mill using a milling medium, characterized in that ratio Hb/r of radius r of a cylindrical ball mill container and depth Hb of the milling medium in the ball mill container disposed horizontally ranges from 1.2 to 1.9, and the ball mill container is rotated at a rotational speed which is 50% or less of critical rotational speed Nc=299/r1/2 of the ball mill container converted from the radius r expressed in centimeter. The milling method can be carried out in a wet or dry process, and the cerium compound is preferably cerium oxide. The method can be also applied for producing a cerium compound slurry.
    Type: Application
    Filed: February 26, 2008
    Publication date: July 3, 2008
    Applicant: Nissan Chemical Industries, Ltd.
    Inventors: Isao Ota, Kenji Tanimoto, Gen Yamada, Noriyuki Takakuma
  • Publication number: 20080073796
    Abstract: An electrically optimized and structurally protected micro via structure for high speed signals in multilayer interconnection substrates is provided. The via structure eliminates the overlap of a contact with the reference planes to thereby reduce the via capacitance and thus, the via impedance mismatch in the via structure. As a result, the via structure is electrically optimized. The via structure further comprises one or more floating support members placed in close proximity to the via within a via clearance area between the via and the reference planes. The floating support members are “floating” in the sense that they are not in electrical contact with either the via or the reference planes. Thus, they are not provided for purposes of signal propagation but only for structural support. The floating support members may be connected to one another by way of one or more microvia structures.
    Type: Application
    Filed: September 27, 2006
    Publication date: March 27, 2008
    Inventors: Paul M. Harvey, Kazushige Kawasaki, Gen Yamada
  • Publication number: 20050253001
    Abstract: A method of milling cerium compound by means of a ball mill using a milling medium, characterized in that ratio Hb/r of radius r of a cylindrical ball mill container and depth Hb of the milling medium in the ball mill container disposed horizontally ranges from 1.2 to 1.9, and the ball mill container is rotated at a rotational speed which is 50% or less of critical rotational speed Nc=299/r1/2 of the ball mill container converted from the radius r expressed in centimeter. The milling method can be carried out in a wet or dry process, and the cerium compound is preferably cerium oxide. The method can be also applied for producing a cerium compound slurry.
    Type: Application
    Filed: July 3, 2003
    Publication date: November 17, 2005
    Applicant: Nissan Chemical Industries, Ltd.
    Inventors: Isao Ota, Kenji Tanimoto, Gen Yamada, Noriyuki Takakuma
  • Patent number: 6719819
    Abstract: For aluminum disks and glass-made hard disks, those disks having a mean waviness of less than 3 Å are being desired in order to increase the density of memory capacity. The present invention provides polishing compositions that can give smoothly polished surfaces for the disks. The polishing compositions are polishing compositions for aluminum disks or substrates having silica on the surface thereof, which contain colloidal silica particle groups having different particle size distributions and have a SiO2 concentration of 0.5 to 50% by weight.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: April 13, 2004
    Assignee: Nissan Chemical Industries, Ltd.
    Inventors: Isao Ota, Tohru Nishimura, Gen Yamada
  • Publication number: 20030110711
    Abstract: For aluminum disks and glass-made hard disks, those disks having a mean waviness of less than 3 Å are being desired in order to increase the density of memory capacity. The present invention provides polishing compositions that can give smoothly polished surfaces for the disks.
    Type: Application
    Filed: October 28, 2002
    Publication date: June 19, 2003
    Applicant: Nissan Chemical Industries, Ltd.
    Inventors: Isao Ota, Tohru Nishimura, Gen Yamada