Abstract: An oscillator provides a series of pulses to the first of a plurality of cascaded counters. The BCD outputs of each counter provide a particular digit in the number of pulses counted during selected intervals. At least two AND means are coupled to respective sets of the counter outputs to provide speed signals when the corresponding numbers of pulses have been counted. A selected one of such signals resets the counters and also provides an inductive output for the magnetic probe of a timing meter. Additional AND means are respectively coupled to different sets of the counter outputs and provide timing signals when their respective numbers of pulses have been counted. A selected one of the timing signals energizes an LED which produces a light flash for the luminosity probe of the timing meter.

Abstract: A mounting assembly for a power transistor integrated circuit chip having a pair of electrodes on one surface thereof comprising base and emitter connections and a third electrode on the opposite surface thereof comprising the collector connection, is fabricated by the method including the steps of providing an electrically conductive strip having a central cavity extending the length thereof, the depth of the cavity being substantially equal to the height of the chip and the strip also including arms extending outwardly at opposite sides of the cavity; tinning the strip with solder; placing transistor chips in the cavity adjacent each other with the collector electrodes thereof being in contacting engagement with the strip; heating the strip with the chips therein to reflow the solder for connecting the chips thereto at the collector electrode; and severing the strip transverse the length thereof between chips to provide individual power transistor chip mounting assemblies each having a pair of outwardly ext

Abstract: A mounting assembly for a power transistor integrated circuit chip having a pair of electrodes on one surface thereof comprising base and emitter connections and a third electrode on the opposite surface thereof comprising the collector connection, is fabricated by the method including the steps of providing an electrically conductive strip having a central cavity extending the length thereof, the depth of the cavity being substantially equal to the height of the chip and the strip also including arms extending outwardly at opposite sides of the cavity; tinning the strip with solder; placing transistor chips in the cavity adjacent each other with the collector electrodes thereof being in contacting engagement with the strip; heating the strip with the chips therein to reflow the solder for connecting the chips thereto at the collector electrode; and severing the strip transverse the length thereof between chips to provide individual power transistor chip mounting assemblies each having a pair of outwardly ext