Patents by Inventor Geng Hsin Shen

Geng Hsin Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stacked multichip package
    Patent number: 8237249
    Abstract: A stacked multichip package comprises a first chip having a first active surface and a first rear surface, a first chip carrier having a first opening and being configured to carrier the first active surface, a plurality of first conductive leads passing through the first opening and being configured to electrically connect the first active surface and the first chip carrier, a second chip having a second active surface and a second rear surface, an adhesive layer configured to enclose the first conductive leads and to electrically couple the first chip carrier to the second rear surface, a second chip carrier having a second opening and being electrically connected to the second active surface, and a plurality of conductive leads passing through the second opening and being configured to electrically connect the second active surface and the second chip carrier.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: August 7, 2012
    Assignee: Chipmos Technologies Inc.
    Inventor: Geng Hsin Shen
  • STACKED MULTICHIP PACKAGE
    Publication number: 20100244278
    Abstract: A stacked multichip package comprises a first chip having a first active surface and a first rear surface, a first chip carrier having a first opening and being configured to carrier the first active surface, a plurality of first conductive leads passing through the first opening and being configured to electrically connect the first active surface and the first chip carrier, a second chip having a second active surface and a second rear surface, an adhesive layer configured to enclose the first conductive leads and to electrically couple the first chip carrier to the second rear surface, a second chip carrier having a second opening and being electrically connected to the second active surface, and a plurality of conductive leads passing through the second opening and being configured to electrically connect the second active surface and the second chip carrier.
    Type: Application
    Filed: September 10, 2009
    Publication date: September 30, 2010
    Applicants: CHIPMOS TECHNOLOGIES INC., CHIPMOS TECHNOLOGIES (BERMUDA) LTD.
    Inventor: Geng Hsin Shen