Abstract: A system for controlling amplifier power is provided. The system includes a voltage envelope detector receiving a voltage signal and generating an attenuated voltage envelope signal. A current envelope detector receives a current signal and generates an attenuated current envelope signal. A controller receives power level data and generates attenuation control data for the voltage envelope signal and the current envelope signal. A detector receives the voltage envelope signal and the current envelope signal and generates a control signal based on the greater of the voltage envelope signal and the current envelope signal. A power amplifier level controller receives the control signal and generates a power amplifier level control signal.

Abstract: A system for correcting a second order intermodulation product in a direct conversion receiver is provided. The system includes a cross-covariance system receiving a data signal and a second order intermodulation estimate signal and generating a cross-covariance value. An auto-covariance system receives the second order intermodulation estimate signal and generates an auto covariance value. A buffer system stores a second order intermodulation product correction factor. A divider receives the cross-covariance value, the auto-covariance value and the second order intermodulation product correction factor and generates a running average second order intermodulation product correction factor.

Abstract: A system for correcting a second order intermodulation product in a direct conversion receiver is provided. The system includes a cross-covariance system receiving a data signal and a second order intermodulation estimate signal and generating a cross-covariance value. An auto-covariance system receives the second order intermodulation estimate signal and generates an auto covariance value. A buffer system stores a second order intermodulation product correction factor. A divider receives the cross-covariance value, the auto-covariance value and the second order intermodulation product correction factor and generates a running average second order intermodulation product correction factor.

Abstract: A system for controlling amplifier power is provided. The system includes a voltage envelope detector receiving a voltage signal and generating an attenuated voltage envelope signal. A current envelope detector receives a current signal and generates an attenuated current envelope signal. A controller receives power level data and generates attenuation control data for the voltage envelope signal and the current envelope signal. A detector receives the voltage envelope signal and the current envelope signal and generates a control signal based on the greater of the voltage envelope signal and the current envelope signal. A power amplifier level controller receives the control signal and generates a power amplifier level control signal.

Abstract: A system for correcting a second order intermodulation product in a direct conversion receiver is provided. The system includes a cross-covariance system receiving a data signal and a second order intermodulation estimate signal and generating a cross-covariance value. An auto-covariance system receives the second order intermodulation estimate signal and generates an auto covariance value. A buffer system stores a second order intermodulation product correction factor. A divider receives the cross-covariance value, the auto-covariance value and the second order intermodulation product correction factor and generates a running average second order intermodulation product correction factor.

Abstract: A system for controlling amplifier power is provided. The system includes a voltage envelope detector receiving a voltage signal and generating an attenuated voltage envelope signal. A current envelope detector receives a current signal and generates an attenuated current envelope signal. A controller receives power level data and generates attenuation control data for the voltage envelope signal and the current envelope signal. A detector receives the voltage envelope signal and the current envelope signal and generates a control signal based on the greater of the voltage envelope signal and the current envelope signal. A power amplifier level controller receives the control signal and generates a power amplifier level control signal.

Abstract: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control signal and a square root module configured to receive state information, the state information corresponding to tuning information, the square root module further configured to multiply the control signal by a square root of the state information to provide a tuning signal.

Abstract: A system for correcting a second order intermodulation product in a direct conversion receiver is provided. The system includes a cross-covariance system receiving a data signal and a second order intermodulation estimate signal and generating a cross-covariance value. An auto-covariance system receives the second order intermodulation estimate signal and generates an auto covariance value. A buffer system stores a second order intermodulation product correction factor. A divider receives the cross-covariance value, the auto-covariance value and the second order intermodulation product correction factor and generates a running average second order intermodulation product correction factor.

Abstract: A system for controlling amplifier power is provided. The system includes a voltage envelope detector receiving a voltage signal and generating an attenuated voltage envelope signal. A current envelope detector receives a current signal and generates an attenuated current envelope signal. A controller receives power level data and generates attenuation control data for the voltage envelope signal and the current envelope signal. A detector receives the voltage envelope signal and the current envelope signal and generates a control signal based on the greater of the voltage envelope signal and the current envelope signal. A power amplifier level controller receives the control signal and generates a power amplifier level control signal.

Abstract: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control signal and a square root module configured to receive state information, the state information corresponding to tuning information, the square root module further configured to multiply the control signal by a square root of the state information to provide a tuning signal.

Abstract: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control signal and a square root module configured to receive state information, the state information corresponding to tuning information, the square root module further configured to multiply the control signal by a square root of the state information to provide a tuning signal.

Abstract: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control current and varies the control current in proportion to an inverse of N squared. N is the ratio of the output frequency of the PLL system to the reference frequency of the PLL system. The varying of the control current compensates for bandwidth changes of the PLL system.

Abstract: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control signal and a square root module configured to receive state information, the state information corresponding to tuning information, the square root module further configured to multiply the control signal by a square root of the state information to provide a tuning signal.

Abstract: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control current and varies the control current in proportion to an inverse of N squared. N is the ratio of the output frequency of the PLL system to the reference frequency of the PLL system. The varying of the control current compensates for bandwidth changes of the PLL system.