Abstract: Data processing apparatus includes a storage circuit or memory, and an addressing circuit for identifying word locations within the storage circuit or memory into and from which a plurality of information items are to be written and read, respectively. A translating circuit is provided for successively shifting, in a write mode of operation, at least a portion of each information item so that it is stored in the storage circuit in a manner that the stored information item in each word location has a bit order different from that order of any other information item as stored in the storage circuit. In a read mode of operation, the translating or de-skewing circuit shifts the information items as read out from the storage circuit in a direction opposite to that imparted during the writing mode.

Abstract: An information retrieval system is described comprising a store having a plurality of word locations, each of M bits for receiving and storing an item of digital data, e.g. an operand of N bits greater than M, a store address circuit for addressing simultaneously selective consecutive bits of an operand in two or more adjacent word locations, and a shift circuit for rearranging the bits read from the store into a desired sequence. A ROM is provided for storing a plurality of multiple-bit words, each defining a different end around shift, and the store addressing circuit includes a multiplexing circuit responsive to the aforementioned multiple-bit words to determine the addresses of each bit of two consecutive word locations within the store.

Abstract: Data processing apparatus includes a storage circuit or memory, and an addressing circuit for identifying word locations within the storage circuit into and from which a plurality of information items are to be written and read, respectively. Further, there is included an encoding circuit for encoding at least a part of each information item in one-out-of-n code, illustratively. In turn, the encoded part is successively shifted by a shift circuit so that it is stored in the storage circuit in a manner that the stored information in each word location has a bit order different from that order of any other information item as stored in the storage circuit. A translating or de-skewing circuit is provided for shifting the encoded data items as read out from the storage circuit in a direction opposite to that imparted by the first noted shift circuit.