Patents by Inventor Geoffrey Owen Blandy
Geoffrey Owen Blandy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7814130Abstract: A method, system, and program for efficient parallel bitwise sweeps of larger objects during garbage collection are provided. During a bitwise sweep, a helper thread scans a mark vector looking for a consecutive sequence of unmarked bits of a sufficient length following a marked bit. Once a consecutive sequence of unmarked bits of a sufficient length following a marked bit is detected, the helper thread fetches the size of a marked object corresponding to the marked bit. If the size of the marked object exceeds a size represented by the consecutive sequence of unmarked bits, the remainder of the bits representing the marked object are skipped, such that once a marked object is identified as potentially exceeding an object fetch threshold the helper thread efficiently skips the remainder of the bits represents the marked object and continues scanning for a number of consecutive zeroes indicating free space.Type: GrantFiled: March 19, 2008Date of Patent: October 12, 2010Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Patent number: 7461220Abstract: A garbage collector predicts future allocation requirements and then distributes free items to multiple subpool free lists and a TLH free list during the sweep phase according to the future allocation requirements. The sizes of subpools and number of free items in subpools are predicted as the most likely to match future allocation requests. Once a subpool free list is filled with the number of free items needed according to the future allocation requirements, any additional free items designated for the subpool free list can be divided into multiple TLH sized free items and placed on the TLH free list. Allocation threads are enabled to acquire free items from the TLH free list and to replenish a current TLH without acquiring heap lock.Type: GrantFiled: February 18, 2008Date of Patent: December 2, 2008Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Publication number: 20080215648Abstract: A method, system, and program for efficient parallel bitwise sweeps of larger objects during garbage collection are provided. During a bitwise sweep, a helper thread scans a mark vector looking for a consecutive sequence of unmarked bits of a sufficient length following a marked bit. Once a consecutive sequence of unmarked bits of a sufficient length following a marked bit is detected, the helper thread fetches the size of a marked object corresponding to the marked bit. If the size of the marked object exceeds a size represented by the consecutive sequence of unmarked bits, the remainder of the bits representing the marked object are skipped, such that once a marked object is identified as potentially exceeding an object fetch threshold the helper thread efficiently skips the remainder of the bits represents the marked object and continues scanning for a number of consecutive zeroes indicating free space.Type: ApplicationFiled: March 19, 2008Publication date: September 4, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: GEOFFREY OWEN BLANDY
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Publication number: 20080140738Abstract: A method, system, and program for improving free item distribution among multiple free lists during garbage collection for more efficient object allocation are provided. A garbage collector predicts future allocation requirements and then distributes free items to multiple subpool free lists and a TLH free list during the sweep phase according to the future allocation requirements. The sizes of subpools and number of free items in subpools are predicted as the most likely to match future allocation requests. In particular, once a subpool free list is filled with the number of free items needed according to the future allocation requirements, any additional free items designated for the subpool free list can be divided into multiple TLH sized free items and placed on the TLH free list. Allocation threads are enabled to acquire free items from the TLH free list and to replenish a current TLH without acquiring heap lock.Type: ApplicationFiled: February 18, 2008Publication date: June 12, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: GEOFFREY OWEN BLANDY
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Patent number: 7376684Abstract: A method, system, and program for efficient parallel bitwise sweeps of larger objects during garbage collection are provided. During a bitwise sweep, a helper thread scans a mark vector looking for a consecutive sequence of unmarked bits of a sufficient length following a marked bit. Once a consecutive sequence of unmarked bits of a sufficient length following a marked bit is detected, the helper thread fetches the size of a marked object corresponding to the marked bit. If the size of the marked object exceeds a size represented by the consecutive sequence of unmarked bits, the remainder of the bits representing the marked object are skipped, such that once a marked object is identified as potentially exceeding an object fetch threshold the helper thread efficiently skips the remainder of the bits represents the marked object and continues scanning for a number of consecutive zeroes indicating free space.Type: GrantFiled: June 4, 2004Date of Patent: May 20, 2008Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Patent number: 7370162Abstract: A method, system, and program for improving free item distribution among multiple free lists during garbage collection for more efficient object allocation are provided. A garbage collector predicts future allocation requirements and then distributes free items to multiple subpool free lists and a TLH free list during the sweep phase according to the future allocation requirements. The sizes of subpools and number of free items in subpools are predicted as the most likely to match future allocation requests. In particular, once a subpool free list is filled with the number of free items needed according to the future allocation requirements, any additional free items designated for the subpool free list can be divided into multiple TLH sized free items and placed on the TLH free list. Allocation threads are enabled to acquire free items from the TLH free list and to replenish a current TLH without acquiring heap lock.Type: GrantFiled: October 12, 2006Date of Patent: May 6, 2008Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Patent number: 7149866Abstract: A method, system, and program for improving free item distribution among multiple free lists during garbage collection for more efficient object allocation are provided. A garbage collector predicts future allocation requirements and then distributes free items to multiple subpool free lists and a TLH free list during the sweep phase according to the future allocation requirements. The sizes of subpools and number of free items in subpools are predicted as the most likely to match future allocation requests. In particular, once a subpool free list is filled with the number of free items needed according to the future allocation requirements, any additional free items designated for the subpool free list can be divided into multiple TLH sized free items and placed on the TLH free list. Allocation threads are enabled to acquire free items from the TLH free list and to replenish a current TLH without acquiring heap lock.Type: GrantFiled: June 4, 2004Date of Patent: December 12, 2006Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Patent number: 7149870Abstract: A method, system, and program for assigning sections within a memory heap for efficient garbage collection of large objects are provided. A first portion of a memory heap is distributed among a first number of sections from among multiple sections, wherein the first number of sections correspond to a number of helper threads allocable for bitwise sweeping of the memory heap during garbage collection. A section portion of the memory heap is distribution among a second number of sections, wherein a size of the memory heap distribution of the second number of sections progressively decreases, such that the total number of sections within the memory is minimized, but any disparity between each of the helper threads completing sweeps of all the sections is reduced.Type: GrantFiled: June 4, 2004Date of Patent: December 12, 2006Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Patent number: 7010555Abstract: A system and method for incrementally compacting a computer system heap is presented. A heap, such as a garbage-collected heap in a Java environment, is divided into logical regions. When the heap is becoming fragmented, an incremental compaction cycle is commenced. During a first time period, the first region of the heap is compacted, with subsequent regions being compacted during subsequent time periods. A time period commences when a garbage collection event occurs. In a multiprocessor environment the regions can be divided into a number of sections which are each compacted using a different processor. One or more break tables are constructed indicating how far contiguous groups of moveable objects should be moved to better group objects and eliminate interspersed free spaces. References throughout the heap that point to objects within the compacted region are then adjusted so that the references point to the new object locations.Type: GrantFiled: October 17, 2002Date of Patent: March 7, 2006Assignee: International Business Machines CorporationInventors: Geoffrey Owen Blandy, Robert Tod Dimpsey, Kean G. Kuiper, Matthew Francis Peters
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Patent number: 6983361Abstract: An apparatus and method for implementing a switch instruction in the IA64 architecture is provided. With the apparatus and method, a first register is used to identify whether a low is either 0, 1 or some other value, and a second register is used to identify a shift amount. The first register is then shifted by the shift amount in the second register. The first register value is then moved to the predicate register set in the IA64 architecture, thereby identifying which branch is to be taken. If the first register is shifted outside the predicate registers, a default address is provided.Type: GrantFiled: September 28, 2000Date of Patent: January 3, 2006Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Patent number: 6912647Abstract: An apparatus and method for creating instruction groups for explicitly parallel architectures is provided. The apparatus and method accept instruction groups as input and determine a number of each possible type of instruction in the instruction group. Based on the number of each possible type of instruction in the instruction group, instruction bundling is performed such that the instructions in the instruction group are bundled into efficiently executed bundles. The instruction bundling further accommodates intra-bundle stop bundles in the event that more efficient bundles are not possible. The instruction bundling is performed based on a most restrictive instruction type placement first and proceeds to less restrictive instruction type placement.Type: GrantFiled: September 28, 2000Date of Patent: June 28, 2005Assignee: International Business Machines CorportionInventor: Geoffrey Owen Blandy
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Patent number: 6886094Abstract: An apparatus and method are provided for detecting and handling exceptions. Instructions that are executed only when there is an exception pending are qualified by a first predicate register in a predicate register pair. Instructions that are executed only when there is no exception pending are qualified based on a second predicate register in the predicate register pair. When an exception is thrown, a determination is made as to whether or not the instruction that threw the exception is in a try block, or range, of the method that threw the exception. If not, the first predicate register predicated instruction to branch to a return stub for the method is generated. If the instruction that threw the exception is in a try block of the method, the first predicate register predicated instruction to branch to a snippet associated with the method is generated.Type: GrantFiled: September 28, 2000Date of Patent: April 26, 2005Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Patent number: 6883165Abstract: An apparatus and method for avoiding deadlocks in a multithreaded environment is provided. The apparatus and method provide a mechanism by which multiple threads are allowed to call a method virtually simultaneously without experiencing the problems regarding multiple compilations of the same method or a lock being held by one thread while other threads wait on the lock. With the apparatus and method, the first thread to call a method is the thread that causes the method to be compiled. Subsequent calls to the method, during a period of time in which the method is being compiled, are redirected to the JVM interpreter, thereby avoiding any deadlock situation.Type: GrantFiled: September 28, 2000Date of Patent: April 19, 2005Assignee: International Business Machines CorporationInventors: Geoffrey Owen Blandy, Andrew Johnson
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Patent number: 6799262Abstract: An apparatus and method for creating instruction groups for explicitly parallel architectures is provided. The apparatus and method gather information about the underlying architecture for use in an instruction group creation phase. The information gathered includes the number of each type of execution unit available and the number of bundles that can be dispatched concurrently by the architecture. The instruction group creation of the present invention includes three phases: a first phase for performing initial grouping, a second phase for hosting instructions from further down in the program instruction order if the instruction is not able to be added during the initial grouping phase, and a third optional phase for counting the number of bundles formed to thereby inform a Just-In-Time compiler of the amount of space need to be allocated in a code buffer.Type: GrantFiled: September 28, 2000Date of Patent: September 28, 2004Assignee: International Business Machines CorporationInventors: Geoffrey Owen Blandy, Andrew Johnson, Danling Shi
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Patent number: 6792600Abstract: A method and apparatus provides a process in a data processing system for executing a method having a plurality of paths. The data processing system executes native machine code. A path is identified within the method that is being executed, wherein a plurality of bytecodes are associated with the path. Bytecodes are compiled for the path being executed, wherein the bytecodes are compiled into native machine code, wherein bytecodes for unexecuted paths remain uncompiled.Type: GrantFiled: May 14, 1998Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Patent number: 6779188Abstract: Apparatus and methods are provided for improving devirtualization of method calls. The apparatus and methods reduce the amount of processing time used in performing lookups of methods by limiting such lookups to calls of methods that have been either overridden or overloaded. If a method has not been overridden or overloaded, a branch to the compiled method code is directly taken. If a method has been overridden or overloaded, a lookup routine is executed for looking-up the appropriate method to be invoked on the passed object. The identification of whether to use a lookup routine may be performed in many different ways including providing an extra field in a method block of the method, inserting code into a prolog of the method, and the like.Type: GrantFiled: September 28, 2000Date of Patent: August 17, 2004Assignee: International Business Machines CorporationInventors: Geoffrey Owen Blandy, Andrew Johnson
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Patent number: 6779106Abstract: An apparatus and method for performing integer divide operations in an IA64 architecture based data processing system is provided. The apparatus and method insert integer divide checks in place of NOP instructions in the instruction bundles associated with integer divide operations. The checks serve to identify typically encountered integer divide operations. Based on such identifications, the integer divide operation may be short-circuited such that the appropriate result may be returned without having to complete the integer divide operation.Type: GrantFiled: September 28, 2000Date of Patent: August 17, 2004Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Publication number: 20040078381Abstract: A system and method for incrementally compacting a computer system heap is presented. A heap, such as a garbage-collected heap in a Java environment, is divided into logical regions. When the heap is becoming fragmented, an incremental compaction cycle is commenced. During a first time period, the first region of the heap is compacted, with subsequent regions being compacted during subsequent time periods. A time period commences when a garbage collection event occurs. In a multiprocessor environment the regions can be divided into a number of sections which are each compacted using a different processor. One or more break tables are constructed indicating how far contiguous groups of moveable objects should be moved to better group objects and eliminate interspersed free spaces. References throughout the heap that point to objects within the compacted region are then adjusted so that the references point to the new object locations.Type: ApplicationFiled: October 17, 2002Publication date: April 22, 2004Applicant: International Business Machines CorporationInventors: Geoffrey Owen Blandy, Robert Tod Dimpsey, Kean G. Kuiper, Matthew Francis Peters
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Patent number: 6704926Abstract: A process in a data processing system for just-in-time compiling instructions. A set of non-specific data processing system instructions for a method are received. Addresses are placed into a set of functions. The set of non-specific data processing system instructions are processed using an intermediate code generation process to generate a set of instructions for execution using a particular mode of addressing.Type: GrantFiled: September 28, 2000Date of Patent: March 9, 2004Assignee: International Business Machines CorporationInventors: Geoffrey Owen Blandy, Andrew Johnson
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Patent number: 6654778Abstract: A method and apparatus for a process in a computer for processing a method that performs a function. A determination is made as to whether the method is to be executed normally when the method is loaded. Responsive to an absence of a determination that the method is a method to be executed normally, instructions native to the computer are associated with the method, wherein the instructions perform the function.Type: GrantFiled: January 29, 1999Date of Patent: November 25, 2003Assignee: International Business Machines CorporationInventors: Geoffrey Owen Blandy, Bentley John Hargrave