Patents by Inventor Geon-Ook Park
Geon-Ook Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7470969Abstract: A semiconductor device and a fabrication method thereof in which the semiconductor device includes capacitors having a metal/insulator/metal (MIM) structure are disclosed. The method includes forming an interlayer insulating film on a structure of a semiconductor substrate that exposes lower wiring and a lower insulating film; selectively etching the interlayer insulating film to form a first electrode opening that exposes the lower wiring; forming a first electrode in the first electrode opening such that the first electrode opening is filled; selectively etching the interlayer insulating film at a region of the same adjacent to the first electrode to thereby form a second electrode opening; forming a dielectric layer along inner walls that define the second electrode opening; forming a second electrode on the dielectric layer in such a manner to fill the second electrode opening; and forming upper wiring on at least a portion of the second electrode.Type: GrantFiled: July 22, 2005Date of Patent: December 30, 2008Assignee: Dongbu Electronics Co., Ltd.Inventor: Geon-Ook Park
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Publication number: 20080191290Abstract: Semiconductor devices and methods of manufacturing the same are disclosed. A disclosed semiconductor device comprises a semiconductor substrate; a gate formed on the semiconductor substrate; a gate oxide layer interposed between the semiconductor substrate and the gate; and source and drain regions formed within the substrate at opposite sides of the gate. The gate oxide layer has a first region with a first thickness and a second region with a second thickness. The second thickness is thicker than the first thickness.Type: ApplicationFiled: January 31, 2008Publication date: August 14, 2008Inventor: Geon-Ook Park
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Patent number: 7354834Abstract: Semiconductor devices and methods of fabricating the same are disclosed. One example method may include forming sequentially a pad oxide film and a silicon nitride film on an entire surface of a semiconductor substrate, forming the trench by etching the silicon nitride film and the semiconductor substrate up to a predetermined depth, and forming a liner oxide film with a thickness thinner than that of the silicon nitride film on an inner wall of the trench. The example method may also include applying a negative voltage to a back surface of the semiconductor substrate and forming an insulation film to fill the trench on the liner oxide film.Type: GrantFiled: December 26, 2003Date of Patent: April 8, 2008Assignee: Dongbu Electronics Co., Ltd.Inventor: Geon-Ook Park
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Patent number: 7348247Abstract: Semiconductor devices and methods of manufacturing the same are disclosed. A disclosed semiconductor device comprises a semiconductor substrate; a gate formed on the semiconductor substrate; a gate oxide layer interposed between the semiconductor substrate and the gate; and source and drain regions formed within the substrate at opposite sides of the gate. The gate oxide layer has a first region with a first thickness and a second region with a second thickness. The second thickness is thicker than the first thickness.Type: GrantFiled: November 5, 2004Date of Patent: March 25, 2008Assignee: Dongbu Electronics Co., Ltd.Inventor: Geon-Ook Park
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Patent number: 7307024Abstract: A flash memory and a fabrication method thereof, which is capable of improving a whole capacitance of the flash memory by forming a tunneling oxide and a floating gate only in a portion where injection of electrons occurs. A flash memory wherein a tunneling oxide and a floating gate are formed only in a portion where injection of electrons occurs and a gate insulation film is formed on a semiconductor substrate between two portions of the tunneling oxide.Type: GrantFiled: December 30, 2003Date of Patent: December 11, 2007Assignee: Dongbu Hitek Co., Ltd.Inventor: Geon-Ook Park
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Patent number: 7217633Abstract: Methods for fabricating a shallow trench isolation (STI) of a semiconductor device are disclosed. A disclosed method includes: forming a trench on a semiconductor substrate, forming an oxide layer on the semiconductor substrate and the trench, forming a photoresist pattern on the oxide layer exposing the oxide layer on a bottom surface of the trench, forming STI films on sidewalls of the trench by etching the exposed oxide layer using the photoresist pattern as an etch protection layer, removing the photoresist pattern, developing an epitaxial layer between the STI, and planarizing the epitaxial layer and the oxide layer.Type: GrantFiled: December 30, 2004Date of Patent: May 15, 2007Assignee: Dongbu Electronics Co., Ltd.Inventor: Geon-Ook Park
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Patent number: 7199041Abstract: Methods for fabricating an interlayer dielectric layer of a semiconductor device are disclosed. An illustrated method comprises forming a metallic interconnect on a substrate; depositing an SRO layer on the metallic interconnect while the substrate is located in a chamber; and forming an FSG layer on the SRO layer without removing the substrate from the chamber.Type: GrantFiled: October 12, 2004Date of Patent: April 3, 2007Assignee: Dongbu Electronics Co., Ltd.Inventor: Geon Ook Park
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Patent number: 7199012Abstract: A method for forming a trench in a semiconductor device is disclosed. An example method forms a pad oxide film and a silicon nitride film on a semiconductor substrate, selectively etches the silicon nitride film and the pad oxide film on a region to be formed with a trench, and implants oxygen ions into the semiconductor substrate in the region to be formed with the trench. The example method also forms an oxide in the semiconductor substrate by reacting the oxygen ions with the semiconductor substrate through a thermal diffusion of the oxygen ions, forms the trench by etching the semiconductor substrate and the oxide on the region to be formed with the trench using the silicon nitride film as a mask, forms a liner oxide film on an inner wall of the trench using a thermal diffusion process, and forms an insulation film on the liner oxide film such that the trench is filled.Type: GrantFiled: December 30, 2003Date of Patent: April 3, 2007Assignee: Dongbu Electronics Co., Ltd.Inventor: Geon-Ook Park
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Patent number: 7164173Abstract: A method for manufacturing a metal-oxide-semiconductor transistor prevents the occurrence of a contact spiking phenomenon. The method includes forming a metal thin film and an isolation oxidation film on a semiconductor substrate, and selectively etching the isolation oxidation film such that the isolation oxidation film is left remaining only over a field oxidation film; heat treating the semiconductor substrate to form silicide by the metal thin film in gate, source, and drain regions; removing portions of the metal thin film that is not formed into silicide, that is, removing unreacted metal thin film; removing the isolation oxidation film left remaining on the field oxidation film; and heat treating the semiconductor substrate in an oxygen environment to form the unreacted metal thin film remaining on the field oxidation film into a metal oxidation film. The present invention is related also to a semiconductor device that employs a metal-oxide-semiconductor transistor made using the method.Type: GrantFiled: November 23, 2004Date of Patent: January 16, 2007Assignee: Dongbu Electronics Co., Ltd.Inventor: Geon-Ook Park
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Patent number: 7122440Abstract: A semiconductor device and a fabrication method thereof in which the semiconductor device includes capacitors having a metal/insulator/metal (MIM) structure are disclosed. The method includes forming an interlayer insulating film on a structure of a semiconductor substrate that exposes lower wiring and a lower insulating film; selectively etching the interlayer insulating film to form a first electrode opening that exposes the lower wiring; forming a first electrode in the first electrode opening such that the first electrode opening is filled; selectively etching the interlayer insulating film at a region of the same adjacent to the first electrode to thereby form a second electrode opening; forming a dielectric layer along inner walls that define the second electrode opening; forming a second electrode on the dielectric layer in such a manner to fill the second electrode opening; and forming upper wiring on at least a portion of the second electrode.Type: GrantFiled: April 2, 2004Date of Patent: October 17, 2006Assignee: Dongbu Electronics Co., Ltd.Inventor: Geon-Ook Park
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Patent number: 7091076Abstract: A method of fabricating a gate electrode used for more flexible device design and higher device integrity is disclosed. A disclosed method comprises: forming a first gate electrode by etching the first insulating layer and the first polysilicon layer; forming a second insulating layer and a second polysilicon layer on the resulting structure; forming a second gate electrode by etching the second polysilicon layer, wherein the longitudinal axes of the first and second gate electrodes cross each other at a predetermined angle; forming a third insulating layer on the resulting structure; and forming source and drain regions by an ion implantation.Type: GrantFiled: December 30, 2004Date of Patent: August 15, 2006Assignee: Dongbu Electronics Co., Ltd.Inventor: Geon Ook Park
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Patent number: 7037858Abstract: A method for manufacturing a semiconductor device includes forming a barrier layer on an individual device formed on a semiconductor substrate and including a MOS transistor. An ozone process is performed on the barrier layer. A pre-metal dielectric (I?MD) layer is then formed on the barrier layer.Type: GrantFiled: October 8, 2003Date of Patent: May 2, 2006Assignee: DongbuAnam Semiconductor Inc.Inventor: Geon-Ook Park
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Patent number: 7029998Abstract: The present invention is directed to a method of forming a gate electrode in a semiconductor device, which is capable of reducing a line width of the gate electrode by performing a photolithography process after defining a wide region on which a gate electrode is located on a photoresist twice such that the line width of the gate electrode is not subject to a wavelength of a light source used when the photolithography process is performed.Type: GrantFiled: December 19, 2003Date of Patent: April 18, 2006Assignee: DongbuAnam Semiconductor Inc.Inventor: Geon-Ook Park
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Publication number: 20050269670Abstract: A semiconductor device and a fabrication method thereof in which the semiconductor device includes capacitors having a metal/insulator/metal (MIM) structure are disclosed. The method includes forming an interlayer insulating film on a structure of a semiconductor substrate that exposes lower wiring and a lower insulating film; selectively etching the interlayer insulating film to form a first electrode opening that exposes the lower wiring; forming a first electrode in the first electrode opening such that the first electrode opening is filled; selectively etching the interlayer insulating film at a region of the same adjacent to the first electrode to thereby form a second electrode opening; forming a dielectric layer along inner walls that define the second electrode opening; forming a second electrode on the dielectric layer in such a manner to fill the second electrode opening; and forming upper wiring on at least a portion of the second electrode.Type: ApplicationFiled: July 22, 2005Publication date: December 8, 2005Inventor: Geon-Ook Park
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Patent number: 6946374Abstract: A manufacturing method for fabricating flash memory semiconductor devices is disclosed.Type: GrantFiled: December 17, 2003Date of Patent: September 20, 2005Assignee: DongbuAnam Semiconductor, Inc.Inventor: Geon-Ook Park
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Publication number: 20050145979Abstract: Semiconductor devices and methods of fabricating the same are disclosed. One example method may include forming sequentially a pad oxide film and a silicon nitride film on an entire surface of a semiconductor substrate, forming the trench by etching the silicon nitride film and the semiconductor substrate up to a predetermined depth, and forming a liner oxide film with a thickness thinner than that of the silicon nitride film on an inner wall of the trench. The example method may also include applying a negative voltage to a back surface of the semiconductor substrate and forming an insulation film to fill the trench on the liner oxide film.Type: ApplicationFiled: October 20, 2004Publication date: July 7, 2005Inventor: Geon-Ook Park
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Publication number: 20050142805Abstract: Methods for fabricating a shallow trench isolation (STI) of a semiconductor device are disclosed. A disclosed method includes: forming a trench on a semiconductor substrate, forming an oxide layer on the semiconductor substrate and the trench, forming a photoresist pattern on the oxide layer exposing the oxide layer on a bottom surface of the trench, forming STI films on sidewalls of the trench by etching the exposed oxide layer using the photoresist pattern as an etch protection layer, removing the photoresist pattern, developing an epitaxial layer between the STI, and planarizing the epitaxial layer and the oxide layer.Type: ApplicationFiled: December 30, 2004Publication date: June 30, 2005Inventor: Geon-Ook Park
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Publication number: 20050130441Abstract: Semiconductor devices and methods of manufacturing the same are disclosed. A disclosed semiconductor device comprises a semiconductor substrate; a gate formed on the semiconductor substrate; a gate oxide layer interposed between the semiconductor substrate and the gate; and source and drain regions formed within the substrate at opposite sides of the gate. The gate oxide layer has a first region with a first thickness and a second region with a second thickness. The second thickness is thicker than the first thickness.Type: ApplicationFiled: November 5, 2004Publication date: June 16, 2005Inventor: Geon-Ook Park
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Patent number: 6902968Abstract: A method for manufacturing a metal-oxide-semiconductor transistor prevents the occurrence of a contact spiking phenomenon. The method includes forming a metal thin film and an isolation oxidation film on a semiconductor substrate, and selectively etching the isolation oxidation film such that the isolation oxidation film is left remaining only over a field oxidation film; heat treating the semiconductor substrate to form silicide by the metal thin film in gate, source, and drain regions; removing portions of the metal thin film that is not formed into silicide, that is, removing unreacted metal thin film; removing the isolation oxidation film left remaining on the field oxidation film; and heat treating the semiconductor substrate in an oxygen environment to form the unreacted metal thin film remaining on the field oxidation film into a metal oxidation film. The present invention is related also to a semiconductor device that employs a metal-oxide-semiconductor transistor made using the method.Type: GrantFiled: July 25, 2003Date of Patent: June 7, 2005Assignee: Anam Semiconductor Inc.Inventor: Geon-Ook Park
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Publication number: 20050093068Abstract: A method for manufacturing a metal-oxide-semiconductor transistor prevents the occurrence of a contact spiking phenomenon. The method includes forming a metal thin film and an isolation oxidation film on a semiconductor substrate, and selectively etching the isolation oxidation film such that the isolation oxidation film is left remaining only over a field oxidation film; heat treating the semiconductor substrate to form silicide by the metal thin film in gate, source, and drain regions; removing portions of the metal thin film that is not formed into silicide, that is, removing unreacted metal thin film; removing the isolation oxidation film left remaining on the field oxidation film; and heat treating the semiconductor substrate in an oxygen environment to form the unreacted metal thin film remaining on the field oxidation film into a metal oxidation film. The present invention is related also to a semiconductor device that employs a metal-oxide-semiconductor transistor made using the method.Type: ApplicationFiled: November 23, 2004Publication date: May 5, 2005Applicant: ANAM SEMICONDUCTOR INC.Inventor: Geon-Ook Park