Abstract: Discrete semiconductor chips, such as sheet-diffused diodes are mass-tested after separation from a wafer. A carrier for retaining the chips in a predetermined array for testing has a plurality of cavities located in a planar surface and arranged in accordance with the predetermined array. The devices are loaded into the cavities and retained therein by a vacuum connected to each of the cavities. Electrical contact is made through the bases of the cavities to the bottom surfaces of the chips, while insulating walls of the cavities prevent leakage paths around the chips. The carrier is indexed in steps corresponding to the increments of the array to permit the top surface of each of the loaded chips to be contacted in sequence by a probe to establish electrical connection through such chip to a test set to test the chip.