Abstract: A digital logic gate circuit including a logic block, clock transistor, bias transistor and a negative differential resistance (NDR) diode which acts as an active load for the circuit. The logic block, comprising a plurality of field effect transistors whose control terminals receive the set of input signals to the logic gate, determines the gate function such as inversion, NAND, NOR, MAJORITY, etc. The clock transistor is connected in series with the logic block and the bias transistor is connected in parallel across this series combination. The terminal of the NDR diode affixed to the common terminal of the bias transistor and the logic block forms the output for the logic circuit. NDR diodes include but are not limited to devices such as tunnel diodes and resonant tunneling diodes (RTDs). The folded I-V characteristic of an NDR diode allows the circuits to operate in a bistable clocked mode, where the circuit output latches its state and changes only when the clock signal is active.

Abstract: A semiconductor structure, in the form of a resonant-tunneling transistor employs a quantum well region which is at a lower potential than the conduction band edge in the contacts, as a result of the lower band gap of InGaAs relative to GaAs. Thus, the first energy level in the well lies below the conduction band edge in the contact, and therefore base electrons are retained in bond states. In addition, the base-collector barrier is extended by a gradient of Al.sub.x Ga.sub.1-x As. In the specific embodiment, the barrier is extended by some 300 .ANG., and the proportion of Al decreases away from the barrier until only n.sup.+ GaAs is present. In this manner, tunneling current between the base and collector is significantly reduced, without adversely affecting emitter-collector tunneling current. The structure described herein can be used in a variety of materials, and transistor structures, such as the induced base transistor, in addition to the resonant-tunneling transistor.