Abstract: In a data processing system which includes a common bus to which a plurality of units are connected for the transfer of information, information may be transferred by the highest priority requesting unit during an asynchronously generated bus transfer cycle. Logic is provided for enabling a split bus cycle operation in which the master unit requesting information from the slave unit during a first bus transfer cycle may receive such information from the slave unit during a later slave generated bus transfer cycle. Means are provided for enabling any other units to communicate over the common bus during the time between the first cycle and such later cycle during which the slave unit responds, thereby enabling at least two pairs of units to communicate with each other respectively in an interleaved manner.

Abstract: In a data processing system having a plurality of units coupled for the transfer of information therebetween over a common electrical bus during asynchronously generated information bus transfer cycles, the units are coupled in a priority network and depending upon their respective priority may gain access to the bus before a lower priority unit is so enabled. Each one of the units includes apparatus for responding to a request for the transfer of information from another unit by providing any one of up to three signal responses including a positive acknowledge signal indicating an immediate response, a negative acknowledge signal indicating that the unit will most likely be busy for a relatively extended period of time and a quasi-negative response indicating that the unit will probably be ready during the next asynchronously generated bus transfer cycle.