Abstract: One or more systems, devices, and/or methods provided herein relate to a process for in-process radio frequency (RF) signal quality analysis and amplitude adjustment of one or more RF devices. In one or more embodiments, the RF device can comprise a portion of a quantum computing system, such as of readout electronics thereof, and thus amplitude adjustment can be at a waveform generator that generates pulses to affect one or more qubits of a quantum logic circuit of the quantum computing system. Generally, an electronic device can comprise an RF tap connected to an RF signal component of a first RF signal chain, and an analysis component connected to the RF tap, the analysis component configured to convert an RF signal from the RF signal component and to compare a conversion result thereof to an expected power output that is based on historical data for a second RF signal chain.

Abstract: One or more systems, devices, and/or methods provided herein relate to a process for in-process radio frequency (RF) signal quality analysis and amplitude adjustment of one or more RF devices. In one or more embodiments, the RF device can comprise a portion of a quantum computing system, such as of readout electronics thereof, and thus amplitude adjustment can be at a waveform generator that generates pulses to affect one or more qubits of a quantum logic circuit of the quantum computing system. Generally, an electronic device can comprise an RF tap connected to an RF signal component of a first RF signal chain, and an analysis component connected to the RF tap, the analysis component configured to convert an RF signal from the RF signal component and to compare a conversion result thereof to an expected power output that is based on historical data for a second RF signal chain.

Abstract: A method of controlling a quantum computing output includes generating a baseline quantum computing signal from a quantum computing system. A controlled noise component is added to the quantum computing system. An output from the quantum computing system is read, wherein the output includes the controlled noise component. An effect on the baseline quantum computing signal due to the controlled noise component in the output is determined.

Abstract: Techniques facilitating write-only device state inferences. In one example, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components comprise: a monitor component; and a state component. The monitor component can compare a property of a feedback signal output by a write-only device with a reference signal. The state component can determine a state of the write-only device based on a comparison between the property and the reference signal.

Abstract: Systems for optimizing mounting points for coaxial RF connectors, including a printed circuit board (PCB) comprising a coaxial radio frequency (RF) connector; a faceplate comprising an opening adapted to receive the coaxial RF connector; and a bushing positioned within the opening, wherein the coaxial RF connector is positioned within the bushing.

Abstract: Systems, devices, computer-implemented methods, and/or computer program products that facilitate low power, wideband multitone generation. In one example, a multitone generator device can comprise a controller operatively coupled to first and second digital-to-analog converters (DACs). The controller can apply different delays of a sampling signal to the first and second DACs to facilitate sideband suppression of signals output by the first and second DACs. One aspect of such a multitone generator device is that the multitone generator device can facilitate low power, wideband multitone generation.

Abstract: Techniques facilitating write-only device state inferences. In one example, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components comprise: a monitor component; and a state component. The monitor component can compare a property of a feedback signal output by a write-only device with a reference signal. The state component can determine a state of the write-only device based on a comparison between the property and the reference signal.

Abstract: An apparatus includes a sampling circuit, a sense circuit, and a tuning circuit. The sampling circuit samples an input signal according to a sampling clock signal to produce a sampled signal. The sense circuit determines a scaling factor based on a distortion in the sampled signal caused by the sampling clock signal. The tuning circuit generates an offset signal based on the sampling clock signal and the scaling factor. The offset signal reduces the distortion in the sampled signal caused by the sampling clock signal.

Abstract: An electronic component system includes a chassis that includes a body, an electrically isolated portion, and an insulator disposed between the electrically isolated portion and the body, wherein the insulator is comprised of a first electrically insulating material. The electronic component system further includes a first electronic component mounted to the electrically isolated portion, and a second electronic component mounted to the body and electrically connected to the first electronic component.

Abstract: Systems, devices, computer-implemented methods, and/or computer program products that facilitate low power, wideband multitone generation. In one example, a multitone generator device can comprise a controller operatively coupled to first and second digital-to-analog converters (DACs). The controller can apply different delays of a sampling signal to the first and second DACs to facilitate sideband suppression of signals output by the first and second DACs. One aspect of such a multitone generator device is that the multitone generator device can facilitate low power, wideband multitone generation.

Abstract: Systems, computer-implemented methods and/or computer program products are provided for facilitating waveform synthesis. A system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a composing component that compresses data defining a waveform by employing amplitude partitioning of the data using equivalent sizing. The composing component can further employ run-length encoding to generate a string of integers representing a plurality of groups of the data as partitioned according both to amplitude and progressing time. In an embodiment, a decoding component can employ a binary search to decode a running sum array of integers representing at least a portion of the data, to decompress the data.

Abstract: A method for providing a computer system including: a trivial file transfer protocol (TFTP) server computer, a system management controller computer and a set of subnet(s) including a first subnet, with each subnet of the set of subnet(s) including a primary computer and a plurality of host computers that respectively include a field programmable gate array (FPGA) with programmable blocks, polling, by the system management controller, each computer of the first subnet to determine that all of the computers of the first subnet are ready to receive a broadcast of an FPGA image, instructing the TFTP server computer to send the FPGA image to all of the machines of the first subnet; and sending, by the TFTP server computer and to all of the computers of the first subnet, the FPGA image.

Abstract: Techniques facilitating write-only device state inferences. In one example, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components comprise: a monitor component; and a state component. The monitor component can compare a property of a feedback signal output by a write-only device with a reference signal. The state component can determine a state of the write-only device based on a comparison between the property and the reference signal.

Abstract: An electronic system having a spread spectrum clock is disclosed. A spread spectrum clock source creates and transmits both a spread spectrum clock signal and a modulation signal. A spread spectrum clock generator uses a modulation waveform on the modulation signal to frequency modulate a reference oscillator frequency. A logic unit comprises a Phase Locked Loop that receives the spread spectrum clock signal and the modulation signal and generates a logic unit clock signal.

Abstract: A spread spectrum controller that adjusts frequency range subject to a bit error rate (BER). Measuring the bit error rate (BER) at different clock frequency ranges and comparing the BER to a BER threshold. Narrowing or widening the clock frequency range based on whether the BER is above or below the BER threshold to optimize a system for both performance and compliance.

Abstract: An electronic system having a spread spectrum clock. A spread spectrum clock source creates and transmits both a spread spectrum clock signal and a modulation signal. A spread spectrum clock generator uses a modulation waveform on the modulation signal to frequency modulate a reference oscillator frequency. A logic unit comprises a Phase Locked Loop that receives the spread spectrum clock signal and the modulation signal and generates a logic unit clock signal.