Abstract: In one embodiment, a system comprises a signal source for generating a digital signal in response to a data pull signal; a digital-to-analog converter (DAC); a first plurality of shift registers for registering digital words of the digital signal before receipt by the DAC; a synchronizing logic element for generating the data pull signal, wherein the synchronizing logic element initially generates the data pull signal to cause the signal source to generate a number of data words, ceases communication of the data pull signal upon receipt of a mark signal, and resumes communication of the data pull signal upon receipt of a trigger signal; and a second plurality of shift registers for registering the mark signal before communication to the synchronizing logic element, wherein the first and second plurality of shift registers are enabled by the data pull signal.

Abstract: A system and method are provided for minimizing data-dependent power variations. The system and method can include summing an input with a dither signal, processing the summed signal, and substantially removing the effects of the dither signal from the output. The output is an approximation of processing to the input alone, while certain aspects of processing activity, such as temperature changes and current draw, are less dependent on input values. Variations in data-dependent activities are thus reduced. The effects of the dither signal may be removed by equivalently processing the dither signal alone, and using that result as a compensating signal to cancel components of the processed signal that result from the presence of the dither signal.

Abstract: A digital-to-analog conversion system comprises a digital input, a digital-to-analog converter and a modified digital signal generator. The digital-to-analog converter has a conversion frequency and is subject to a periodic error having a periodicity equal to that of an N-th sub-harmonic of the conversion frequency, where N is an integer. The digital input is operable to receive a digital input signal. The modified digital signal generator is interposed between the digital input and the digital-to-analog converter and is operable in response to the digital input signal to generate a modified digital signal. The modified digital signal comprises a dynamic digital mitigation component that mitigates the periodic error of the digital-to-analog converter.

Abstract: A digital-to-analog conversion system comprises a digital input, a digital-to-analog converter and a modified digital signal generator. The digital-to-analog converter has a conversion frequency and is subject to a periodic error having a periodicity equal to that of an N-th sub-harmonic of the conversion frequency, where N is an integer. The digital input is operable to receive a digital input signal. The modified digital signal generator is interposed between the digital input and the digital-to-analog converter and is operable in response to the digital input signal to generate a modified digital signal. The modified digital signal comprises a dynamic digital mitigation component that mitigates the periodic error of the digital-to-analog converter.

Abstract: A system analyzer may generate an estimated frequency response of a device, system, communication medium, or combination thereof by utilizing a stimulus signal that is robust against IQ modulator impairments. A stimulus generator may be used to generate a plurality of discrete tones according to a frequency spacing and a frequency offset. The frequency spacing and the frequency offset cause spectrally inverted spurs (generated by impairments of the IQ modulator) to occur at frequencies other than frequencies of said modulated signal that are associated with said plurality of discrete tones. Additionally, by implementing a Discrete Fourier Transform (DFT) to possess a frequency resolution equal to the frequency offset, there is no leakage of power associated with the spectrally inverted spurs into frequency bins of the DFT associated with the desired frequency components. Likewise, leakage between the desired frequency components and leakage associated with the local oscillator may be avoided.

Abstract: A digital filter and method of filtering frequency translate or shift a spectrum of a digital input signal and further filter a translated signal to reduce or attenuate frequency components in the spectrum of the input signal. The digital fitter includes first and second translators and a first filter. The first filter is connected between the first and second translators and is centered approximately at direct current (DC). The digital filter may further include a second filter, a third translator connected to an output of the second filter, a complex local oscillator connected to an input of each translator, and a complex-to-real converter connected to an output of the third translator. The method includes frequency translating the digital input signal and separately frequency translating a first translated signal after the first translated signal is filtered to produce a second translated signal.

Abstract: A system and method are provided for minimizing data-dependent power variations. The system and method can include summing an input with a dither signal, processing the summed signal, and substantially removing the effects of the dither signal from the output. The output is an approximation of processing to the input alone, while certain aspects of processing activity, such as temperature changes and current draw, are less dependent on input values. Variations in data-dependent activities are thus reduced. The effects of the dither signal may be removed by equivalently processing the dither signal alone, and using that result as a compensating signal to cancel components of the processed signal that result from the presence of the dither signal.

Abstract: Using component-level test data to reduce system test. By modeling a system, sensitivity analysis reveals critical components and parameters of those components required to meet system performance parameters. Critical components are tested for these parameters, and these measurements associated with the components. Systems may be assembled which are modeled to meet the system performance parameters based on the model and the measured parameters. Systems may be assembled and calibration coefficients derived and applied from the model and the measured parameters.

Abstract: In one representative embodiment, scaling factors and delay values associated with respective analog-to-digital converters (ADCs) of an interleaved ADC are stored in memory. As a digital sample from the interleaved ADC is received, a respective amplitude scaling factor is retrieved from memory and applied to the digital sample. Preferably, a first order correction is then applied to the amplitude corrected-sample. The first order correction estimates the derivative using the current amplitude corrected sample and at least one additional amplitude corrected sample. The derivative is multiplied by an estimate of the respective timing delay associated with the particular sample. The corrected amplitude value is added to the multiple of the derivative and the timing delay to form the fully corrected digital sample.

Abstract: A system analyzer may generate an estimated frequency response of a device, system, communication medium, or combination thereof by utilizing a stimulus signal that is robust against IQ modulator impairments. A stimulus generator may be used to generate a plurality of discrete tones according to a frequency spacing and a frequency offset. The frequency spacing and the frequency offset cause spectrally inverted spurs (generated by impairments of the IQ modulator) to occur at frequencies other than frequencies of said modulated signal that are associated with said plurality of discrete tones. Additionally, by implementing a Discrete Fourier Transform (DFT) to possess a frequency resolution equal to the frequency offset, there is no leakage of power associated with the spectrally inverted spurs into frequency bins of the DFT associated with the desired frequency components. Likewise, leakage between the desired frequency components and leakage associated with the local oscillator may be avoided.

Abstract: An improved method and circuitry for processing high-impedance (current mode) input signals for use in translinear and other mode circuits in a manner that avoids the signal dependent bandwidth variations that occur in the prior art. A non-linear feedback structure using a transconductance gain element is employed to extend the bandwidth and/or suppress bandwidth variations encountered in the prior art. One application of this invention is the extension of Gilbert amplifier topologies, with their attendant normalization and integrated circuit implementation advantages, for operation with very low input signal levels to high bandwidth applications. A further extension in this invention allow this transconductance to be electrically adjusted to allow active bandwidth control or to compensate for signal sources with different input capacitances. The invention is particularly suitable for use as a preamplifier for pairs of sensed photodetector current signals.

Abstract: An improved method of configuring digital information in a recording storage media so as to significantly increase the information storage capacity of the media, and the media containing such configured digital information are disclosed. Information containing markers are arranged and configured along tracks in the media in a manner such that markers of adjacent tracks are offset relative to one another. Inter-track spacings of arcuately shaped tracks on a storage media are progressively reduced as a function of the radial spacing of the tracks from their center of curvature, further increasing the marker packing density. Return to zero pulsed modulation schemes are employed to maximize the amount of information recorded in a given number of marker locations. Drive means for reading digital information configured on storage media according to the principles of this invention are provided.

Abstract: Outputs of a linear phased array antenna can be employed for emitter field sorting, i.e., providing an indication of the frequency and angle of arrival of signals from a plurality of radiation sources, through the use of a two-dimensional optical processor that does not require a mechanism for correcting for acoustic spreading in a multi-channel Bragg cell. In effect, the multi-channel array of transducers of a Bragg cell forms a composite N-channel transducer the width of which is N times the spacing between channels. For a CW radiation source, the signal received by each array element undergoes an incremental phase shift associated with the tilt of the phase front across the array. When these signals are used to drive respectively adjacent transducers of a multi-channel Bragg cell, the acoustic effect within the bulk is equivalent to that of driving a large composite transducer with a constant frequency signal.

Abstract: Linearization of a closed-loop acousto-optic modulation system is maintained over a uniform closed-loop bandwidth that is independent of the output light intensity level through the use of a compensating square-root function generator which employs the third quadrant characteristic of a MOSFET. The MOSFET may be connected as the feedback impedance of an operational amplifier which provides the square-root gain control function for complementing the non-linearity of the acousto-optic modulator. By utilizing the third quadrant characteristics of the source-to-drain voltage relative to the drain current of the MOSFET, the square-root function generator has a transfer function which insures that a linear relationship between modulator output light intensity and input signal current can be obtained irrespective of light intensity.