Abstract: A microprogrammed data processor in which the average processing speed is significantly enhanced by very rapidly processing system-initiated control operations using multiplexed programmable logic arrays. A wide input system encoding programmable logic array (270) responds to input signals which instruct system-initiated control operations, such as interrupts, power failure shut-down operations, system reset operations, ets., to produce internal exception condition opcodes. These opcodes are applied to inputs of a plurality of system decode programmable logic arrays (251-254) which, in response to the opcodes, generate sequences of microwords for executing the system-initiated control operations. The system decode programmable logic arrays (251-254) are activated sequentially and cyclically to generate the sequences of microwords used to carry out each of the control operations.

Abstract: A microword control system is provided for producing the sequences of microwords used to control the execution of processor instructions in a microprogrammed digital data processor. This microword control system includes a plurality of programmable logic array mechanisms responsive to the processor instruction to be executed for individually producing different ones of the microwords needed to execute such instruction. This microword control system also includes microword-responsive control circuitry for controlling the operation of the data processor. This microword control system further includes multiplexing circuitry for supplying microwords from different ones of the programmable logic array mechanisms to the control circuitry during different time intervals.

Abstract: A clocking mechanism is provided for multiple overlapped dynamic programmable logic arrays which are used in a digital control unit wherein a sequence of control words are used to produce successive groups of control point signals. Such a control unit includes a plurality of dynamic programmable logic arrays for individually producing different ones of the control words. Each such control word includes a strobe field which is coded to identify a programmable logic array other than the one which produced it. The control unit also includes control circuitry responsive to the control words for producing the control point signals for successive machine control cycles. The control circuitry includes circuitry responsive to the strobe field in each control word for producing a strobe signal for selecting the next programmable logic array to supply a control word to the control circuitry.

Abstract: A microcode control mechanism is provided for producing the sequences of microwords used to control the execution of processor instructions in a microprogrammed data processor. This microcode control mechanism includes sequence counter circuitry for supplying a sequence of numbers and a programmable logic array mechanism responsive to the processor instruction and to the sequence of numbers for producing a sequence of microwords needed to execute the instruction. The microcode control mechanism also includes repeat circuitry responsive to a predetermined microword produced by the programmable logic array mechanism for setting the sequence counter circuitry back to a count which is less than the current count for causing a selected portion of the microword sequence to be repeated. The microcode control mechanism further includes a programmable repeat counter for counting the number of times the selected portion is repeated and for disabling the repeating action after a selected number of repeats.