Patents by Inventor Gerry R. Talbot

Gerry R. Talbot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6976135
    Abstract: Memory transactions are carried out in an order that maximizes concurrency in a memory system such as a multi-bank interleaved memory system. Read data is collected in a buffer memory to be presented back to the bus in the same order as read transactions were requested. An adaptive algorithm groups writes to minimize overhead associated with transitioning from reading to writing into memory.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: December 13, 2005
    Assignee: Magnachip Semiconductor
    Inventors: Gerry R. Talbot, Austen J. Hypher
  • Patent number: 6272600
    Abstract: Memory transactions are carried out in an order that maximizes concurrency in a memory system such as a multi-bank interleaved memory system. Read data is collected in a buffer memory to be presented back to the bus in the same order as read transactions were requested. An adaptive algorithm groups writes to minimize overhead associated with transitioning from reading to writing into memory.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: August 7, 2001
    Assignee: Hyundai Electronics America
    Inventors: Gerry R. Talbot, Austen J. Hypher