Patents by Inventor Gholamreza Chaji

Gholamreza Chaji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240030195
    Abstract: The present disclosure relates to development of microdevices on a substrate that can be released and transferred to a system substrate. The disclosure further relates to methods to integrate anchors to hold a microdevice to a substrate. The microdevices are in different configurations with respect to anchors, release layers, buffers layers and substrate.
    Type: Application
    Filed: November 12, 2021
    Publication date: January 25, 2024
    Applicant: VueReal Inc.
    Inventors: Gholamreza CHAJI, Hossein Zamani SIBONI, Ehsanollah FATHI
  • Patent number: 11875744
    Abstract: Methods of compensating for common unwanted signals present in pixel data measurements of a pixel circuit in a display having a plurality of pixel circuits each including a storage device, a drive transistor, and a light emitting device. First pixel data is measured from a first pixel circuit through a monitor line. Second pixel data from the first pixel circuit or a second pixel circuit is measured through the monitor line or another monitor line. The first measured pixel data or the second measured pixel data or both are used to clean the other of the first measured pixel data or the second measured pixel data of common unwanted signals to produce cleaned data for parameter extraction from the first pixel and/or second pixel.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: January 16, 2024
    Assignee: Ignis Innovation Inc.
    Inventor: Gholamreza Chaji
  • Patent number: 11870006
    Abstract: The present invention provides light-emitting devices with improved quantum efficiency. The light emitting diode structure comprising: a p-doped layer an n-doped layer; and a multiple quantum well structure sandwiched between the p-doped layer and n-doped layer, wherein the multiple quantum well structure comprising a quantum well disposed between n-doped barrier layers.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: January 9, 2024
    Assignee: VueReal Inc.
    Inventors: Jian Yin, Dayan Ban, Ehsanollah Fathi, Gholamreza Chaji
  • Publication number: 20230422370
    Abstract: The present invention relates to integration of multiple microdevices in pixels and in different combinations and their optimization for different functions. The microdevices may be connected in series and parallel as well have common and separate layers. An integrated combination may have a smoothing function to facilitate switching between different conditions and operations.
    Type: Application
    Filed: November 5, 2021
    Publication date: December 28, 2023
    Applicant: VueReal Inc.
    Inventor: Gholamreza CHAJI
  • Publication number: 20230419906
    Abstract: A method and system determine the characteristics of drive devices and load devices in selected pixels in an array of pixels in a display in which each pixel includes a drive device for supplying current to a load device. The method and system supply current to the load device via the drive device in a selected pixel, the current being a function of a current effective characteristic of at least one of the drive device and the load device; measure the current via a measurement line that is shared by adjacent pixels, and extract the value of a selected effective characteristic of one of the drive and load devices from the effect of the current on another of the drive and load devices. Current may be measured via a read transistor in each pixel.
    Type: Application
    Filed: September 13, 2023
    Publication date: December 28, 2023
    Inventors: Yaser Azizi, Gholamreza Chaji
  • Patent number: 11854783
    Abstract: This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with unwanted pads and the non-interfering area in the donor substrate is maximized. This enables to transfer the devices to receiver substrate with fewer steps.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: December 26, 2023
    Assignee: VueReal Inc.
    Inventor: Gholamreza Chaji
  • Publication number: 20230395579
    Abstract: What is disclosed is structures and methods of integrating microdevices into a system substrate. In particular the structure comprises various components of buffer layer, release layer, pads, electrodes, VIA openings and various planarization layers and passivation layers. These components are configured to form an optoelectronic device or a system. Also described are methods to form an optoelectronic device.
    Type: Application
    Filed: October 19, 2021
    Publication date: December 7, 2023
    Applicant: VueReal Inc.
    Inventor: Gholamreza CHAJI
  • Publication number: 20230395560
    Abstract: This disclosure is related to integrating microdevices into a system substrate. In particular the microdevices are transferred from a donor substrate into a system backplane where the microdevices connection pads are adhered to a pads on the system substrate at a temperature that is below the melting point of the materials on the pads of the system substrate and microdevice pads. The present disclosure also relates to integrating vertical microdevices into a system substrate. The system substrate can have a backplane circuit as well. The integration covers the microdevices with dielectrics and couples the backplane through a VIA. The disclosure further relates to a method and structure of microdevice or optoelectronic devices that allows for misalignment adjustment. The microdevices comprise a stack of semiconductor layers that in configuration with electrodes, substrate, VIA's and size factors minimize misalignment.
    Type: Application
    Filed: September 2, 2021
    Publication date: December 7, 2023
    Applicant: VueReal Inc.
    Inventors: Gholamreza CHAJI, Ehsanollah FATHI, Hossein Zamani SIBONI, Lauren LESERGENT, David HWANG, Pranav GAVIRNENI
  • Patent number: 11830868
    Abstract: Various embodiments include methods of fabricating an array of self-aligned vertical solid state devices and integrating the devices to a system substrate. The method of fabricating a self-aligned vertical solid state device comprising: providing a semiconductor substrate, depositing a plurality of device layers on the semiconductor substrate, depositing an ohmic contact layer on an upper surface of one of the plurality of device layers, wherein the device layers comprises an active layer and a doped conductive layer, forming a patterned thick conductive layer on the ohmic contact layer; and selectively etching down the doped conductive layer that does not substantially etch the active layer.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: November 28, 2023
    Assignee: VueReal Inc.
    Inventors: Gholamreza Chaji, Ehsanollah Fathi
  • Publication number: 20230361263
    Abstract: As the pixel density of optoelectronic devices becomes higher, and the size of the optoelectronic devices becomes smaller, the problem of isolating the individual micro devices becomes more difficult. A method of fabricating an optoelectronic device, which includes an array of micro devices, comprises: forming a device layer structure including a monolithic active layer on a substrate; forming an array of first contacts on the device layer structure defining the array of micro devices; mounting the array of first contacts to a backplane comprising a driving circuit which controls the current flowing into the array of micro devices; removing the substrate; and forming an array of second contacts corresponding to the array of first contacts with a barrier between each second contact.
    Type: Application
    Filed: July 21, 2023
    Publication date: November 9, 2023
    Applicant: VueReal Inc.
    Inventor: Gholamreza Chaji
  • Publication number: 20230361239
    Abstract: A micro device structure comprising at least part of an edge of a micro device is covered with a metal-insulator-semiconductor (MIS) structure, wherein the MIS structure comprises a MIS dielectric layer and a MIS gate conductive layer, at least one gate pad provided to the MIS gate conductive layer, and at least one micro device contact extended upwardly on a top surface of the micro device.
    Type: Application
    Filed: July 21, 2023
    Publication date: November 9, 2023
    Applicant: VueReal Inc.
    Inventors: Gholamreza Chaji, Ehsanollah Fathi, Hossein Zamani Siboni
  • Publication number: 20230341456
    Abstract: This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with non-receiving pads and the non-interfering area in the donor substrate is maximized. This enables the transfer of micro devices to a receiver substrate with fewer steps.
    Type: Application
    Filed: March 7, 2023
    Publication date: October 26, 2023
    Applicant: VueReal Inc.
    Inventors: Gholamreza Chaji, Ehsanollah Fathi
  • Publication number: 20230335683
    Abstract: The disclosure is related to creating different functional micro devices by integration of functional tuning materials and to creating encapsulation capsules to protect these materials. The disclosure also relates to a solid state device and a method to convert a color of a light emitting device into another color.
    Type: Application
    Filed: June 3, 2021
    Publication date: October 19, 2023
    Applicant: VueReal Inc.
    Inventor: Gholamreza CHAJI
  • Patent number: 11790868
    Abstract: Circuits for programming a circuit with decreased programming time are provided. Such circuits include a storage device such as a capacitor for storing display information and for ensuring a driving device such as a driving transistor drives a light emitting device according to the display information. The present disclosure provides driving schemes for decreasing flickering perceived while displaying video content by introducing idle phases in between in emission phases to increase the effective refresh rate of a display. Driving schemes are also disclosed for reducing the effects of cross-talk by ensuring that programming information is refreshed in a display array that utilizes a driver connected to multiple data lines via a multiplexer.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: October 17, 2023
    Assignee: Ignis Innovation Inc.
    Inventors: Gholamreza Chaji, Jackson Chi Sun Lai, Yaser Azizi, Maran Ran Ma
  • Publication number: 20230327050
    Abstract: What is disclosed is various aspects of the structure of flip chip or lateral micro devices having protection of connections. The various aspects comprise a structural combination of functional layers such as doped or blocking layers or quantum well structure, as well as dielectric layers, VIA's, optical enhancements layers, connection pads, protective layers, masks and additional layers. In addition, methods of fabrication of microdevices have also been disclosed where in patterning has been used. The present disclosure further relates to integrating vertical microdevices into a system substrate. The system substrate can have a backplane circuit as well. The integration covers the microdevices with dielectrics and couples the backplane through a VIA.
    Type: Application
    Filed: September 2, 2021
    Publication date: October 12, 2023
    Applicant: VueReal Inc.
    Inventors: Gholamreza CHAJI, Ehsanollah FATHI, Hossein Zamani SIBONI
  • Publication number: 20230326937
    Abstract: In a micro-device integration process, a donor substrate is provided on which to conduct the initial manufacturing and pixelation steps to define the micro devices, including functional, e.g. light emitting layers, sandwiched between top and bottom conductive layers. The micro-devices are then transferred to a system substrate for finalizing and electronic control integration. The transfer may be facilitated by various means, including providing a continuous light emitting functional layer, breakable anchors on the donor substrates, temporary intermediate substrates enabling a thermal transfer technique, or temporary intermediate substrates with a breakable substrate bonding layer.
    Type: Application
    Filed: June 13, 2023
    Publication date: October 12, 2023
    Applicant: VueReal Inc.
    Inventors: Gholamreza Chaji, Ehsanollah Fathi
  • Patent number: 11783773
    Abstract: A method and system determine the characteristics of drive devices and load devices in selected pixels in an array of pixels in a display in which each pixel includes a drive device for supplying current to a load device. The method and system supply current to the load device via the drive device in a selected pixel, the current being a function of a current effective characteristic of at least one of the drive device and the load device; measure the current via a measurement line that is shared by adjacent pixels, and extract the value of a selected effective characteristic of one of the drive and load devices from the effect of the current on another of the drive and load devices. Current may be measured via a read transistor in each pixel.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: October 10, 2023
    Assignee: Ignis Innovation Inc.
    Inventors: Yaser Azizi, Gholamreza Chaji
  • Publication number: 20230307575
    Abstract: What is disclosed is structures and methods of integrating blocks of microdevices into the system backplane. Process is outlined for forming blocks of microdevices and forming of transfer templates to facilitate transfer of blocks of microdevices to the system backplane. Further, aspects deal with microdevices forming blocks from different wafers and substrates.
    Type: Application
    Filed: August 6, 2021
    Publication date: September 28, 2023
    Applicant: VueReal Inc.
    Inventors: Gholamreza CHAJI, Lauren LESERGENT
  • Patent number: 11764199
    Abstract: Various embodiments include methods of fabricating an array of self-aligned vertical solid state devices and integrating the devices to a system substrate. The method of fabricating a self-aligned vertical solid state device comprising: providing a semiconductor substrate, depositing a plurality of device layers on the semiconductor substrate, depositing an ohmic contact layer on an upper surface of one of the plurality of device layers, wherein the device layers comprises an active layer and a doped conductive layer, forming a patterned thick conductive layer on the ohmic contact layer; and selectively etching down the doped conductive layer that does not substantially etch the active layer.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: September 19, 2023
    Assignee: VueReal Inc.
    Inventors: Gholamreza Chaji, Ehsanollah Fathi
  • Publication number: 20230290286
    Abstract: What is disclosed are structures and methods for testing and repairing emissive display systems. Systems are tested with use of temporary electrodes which allow operation of the system during testing and are removed afterward. Systems are repaired after identification of defective devices with use of redundant switching from defective devices to functional devices provided on repair contact pads.
    Type: Application
    Filed: November 2, 2022
    Publication date: September 14, 2023
    Applicant: VueReal Inc.
    Inventor: GHOLAMREZA CHAJI