Abstract: An integrated circuit for the selective completion and interruption of a signal path comprises three transistors of the MOSFET type, i.e., a switching transistor in tandem with a decoupling transistor and a pilot transistor in cascade with the switching transistor. The channels of the switching and decoupling transistors lie in series between supply terminals of opposite potential, together with a load resistor. The channel of the pilot transistor is connected across the same supply terminals by way of a biasing resistor tied to the gate of the switching transistor. On/off voltages are applied to the gate of the pilot transistor while incoming signals are fed to the gate of the decoupling transistor.