Patents by Inventor Gianni Rea

Gianni Rea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120012
    Abstract: A memory device includes an array of memory cells, a diode having a threshold voltage that changes with temperature, an analog-to-digital converter (ADC), and a pulse generator. The ADC includes a voltage comparator having a positive terminal coupled with the diode. The ADC further includes a first capacitor coupled between a negative terminal of the voltage comparator and ground, and a second capacitor selectively coupled between the first capacitor and a voltage reference node. The second capacitor has a smaller capacitance than that of the first capacitor. The pulse generator is coupled with the ADC and generates pulses. The pulses cause the first capacitor to connect to the second capacitor and equalize charge between the first capacitor and the second capacitor. An inverted signal of the pulses causes the second capacitor to be coupled with the voltage reference node to pre-charge the first capacitor.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 11, 2024
    Inventors: Agostino Macerola, Gianni Rea
  • Patent number: 11908530
    Abstract: A memory device includes an array of memory cells, a diode having a threshold voltage that changes with temperature, an analog-to-digital converter (ADC), and a pulse generator. The ADC includes a voltage comparator having a positive terminal coupled with the diode. The ADC further includes a first capacitor coupled between a negative terminal of the voltage comparator and ground, and a second capacitor selectively coupled between the first capacitor and a voltage reference node. The second capacitor has a smaller capacitance than that of the first capacitor. The pulse generator is coupled with the ADC and generates pulses. The pulses cause the first capacitor to connect to the second capacitor and equalize charge between the first capacitor and the second capacitor. An inverted signal of the pulses causes the second capacitor to be coupled with the voltage reference node to pre-charge the first capacitor.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: February 20, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Agostino Macerola, Gianni Rea
  • Publication number: 20230111614
    Abstract: A memory device includes an array of memory cells, a diode having a threshold voltage that changes with temperature, an analog-to-digital converter (ADC), and a pulse generator. The ADC includes a voltage comparator having a positive terminal coupled with the diode. The ADC further includes a first capacitor coupled between a negative terminal of the voltage comparator and ground, and a second capacitor selectively coupled between the first capacitor and a voltage reference node. The second capacitor has a smaller capacitance than that of the first capacitor. The pulse generator is coupled with the ADC and generates pulses. The pulses cause the first capacitor to connect to the second capacitor and equalize charge between the first capacitor and the second capacitor. An inverted signal of the pulses causes the second capacitor to be coupled with the voltage reference node to pre-charge the first capacitor.
    Type: Application
    Filed: March 2, 2022
    Publication date: April 13, 2023
    Inventors: Agostino Macerola, Gianni Rea