Abstract: A galvanic optocoupler of the type monolithically integrated on a silicon substrate and having at least one luminous source and a photodetector interfaced by means of a galvanic insulation layer. The photodetector can be a phototransistor realized in the silicon substrate, and the galvanic insulation layer (40) is a passivation layer of this phototransistor. The luminous source, above the galvanic insulation layer includes an integrated LED having a first and second polysilicon layer with function of cathode and anode, respectively, these first and second layers enclosing at least one light emitter layer, in particular a silicon oxide layer enriched with silicon (SRO). An integration process of a galvanic optocoupler thus made, in particular in BCD3s technology is provided.

Abstract: The present disclosure relates to an architecture of a device with galvanic optocoupling of the type having at least one optical source and one optical detector, optically connected by means of an insulation layer that functions to transmission optical signals, and having at least one input terminal and one output terminal, the optical source and the optical detector connected to a respective first and second voltage reference. The optical source is realized by a structure integrated directly above the insulation layer in correspondence with the optical detector, the architecture thus completely realized inside a single integration island.

Abstract: The present disclosure relates to an architecture of a device with galvanic optocoupling of the type having at least one optical source and one optical detector, optically connected by means of an insulation layer that functions to transmission optical signals, and having at least one input terminal and one output terminal, the optical source and the optical detector connected to a respective first and second voltage reference. The optical source is realized by a structure integrated directly above the insulation layer in correspondence with the optical detector, the architecture thus completely realized inside a single integration island.

Abstract: A galvanic optocoupler of the type monolithically integrated on a silicon substrate and having at least one luminous source and a photodetector interfaced by means of a galvanic insulation layer. The photodetector can be a phototransistor realized in the silicon substrate, and the galvanic insulation layer (40) is a passivation layer of this phototransistor. The luminous source, above the galvanic insulation layer includes an integrated LED having a first and second polysilicon layer with function of cathode and anode, respectively, these first and second layers enclosing at least one light emitter layer, in particular a silicon oxide layer enriched with silicon (SRO). An integration process of a galvanic optocoupler thus made, in particular in BCD3s technology is provided.

Abstract: The invention relates to a control circuit for semiconductor devices which is formed on a substrate (1) doped by a first dopant type, the integrated circuit comprising a first epitaxial layer (2) grown on the substrate (1) and doped by the first dopant type, and an isolation well (3) doped by a second dopant type, the control circuit comprising at least a first control transistor (M1) formed in a first well (8) doped by the second dopant type and formed in the insulation well (3). Thus, the control circuit comprises at least one N-channel MOS transistor accommodated within a well in direct contact with the isolation well to eliminate a buried layer that, in prior art arrangements, involved the presence of an undesired parasitic component.

Abstract: The invention relates to a control circuit for semiconductor devices which is formed on a substrate (1) doped by a first dopant type, the integrated circuit comprising a first epitaxial layer (2) grown on the substrate (1) and doped by the first dopant type, and an isolation well (3) doped by a second dopant type, the control circuit comprising at least a first control transistor (M1) formed in a first well (8) doped by the second dopant type and formed in the insulation well (3). Thus, the control circuit comprises at least one N-channel MOS transistor accommodated within a well in direct contact with the isolation well to eliminate a buried layer that, in prior art arrangements, involved the presence of an undesired parasitic component.