Abstract: A demultiplexer circuit responsive to a composite input signal from a sonobouy. The invention circuit has a filter and comparator means responsive to the composite signal for providing a filtered frequency pilot reference signal. The filtered frequency pilot reference signal has a frequency equal to one half the frequency of a reference carrier signal in the composite signal. The invention circuit has a sine demodulator means responsive to the composite signal and to an east/west demodulator signal for providing an east referenced output signal. A cosine demodulator means is responsive to the composite signal and to a north/south demodulator signal for providing a demodulated phase pilot signal and the north referenced output signal. A north/south filter means is responsive to the output signals from the cosine demodulator means for filtering the demodulated phase pilot signal to provide the north referenced output signal.

Abstract: A demultiplexer test circuit having a signal source summing means responsive to a selected target angle theta for adding a first independent noise signal to an input signal to provide a composite omni signal and for adding a second noise signal to the product of the cosine of the selected target angle and the input signal to provide a composite cosine signal, and for adding a third noise signal to the product of the sine of the selected target angle and the input signal to provide a composite sine signal. A dual output phase shifting means responsive to a selected heading angle phi provides a quad count signal, a quad count clock signal, a reference count signal and a reference count clock signal. The reference count signal is lags the quad count signal by a time interval proportional to the selected heading angle phi.