Patents by Inventor Gilberto Oseguera

Gilberto Oseguera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240133943
    Abstract: A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.
    Type: Application
    Filed: December 11, 2023
    Publication date: April 25, 2024
    Inventors: Karthik RANGANATHAN, Gregory CRUZAN, Samer KABBANI, Gilberto OSEGUERA, Rohan GUPTE, Homayoun REZAI, Kenneth SANTIAGO, Marc GHAZVINI
  • Patent number: 11940487
    Abstract: An apparatus for thermal control of a device under test (DUT) includes a cooling structure operable to provide cooling, the cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet cooling material via an outlet port thereof, a variable thermal conductance material (VTCM) layer disposed on a surface of the cooling structure, and a heater layer operable to generate heat based on an electronic control, and wherein the VTCM layer is operable to transfer cooling from the cooling structure to the heater layer. A thermal interface material layer is disposed on the heater layer. The thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to the DUT. The apparatus includes a compression mechanism for providing compression to the VTCM layer to vary a thermal conductance of the VTCM layer. The compression mechanism is also for decoupling the VTCM layer from the heater layer.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: March 26, 2024
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Samer Kabbani, Kazuyuki Yamashita, Ikeda Hiroki, Ira Leventhal, Mohammad Ghazvini, Paul Ferrari, Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera
  • Publication number: 20240036104
    Abstract: Embodiments of the present invention provide testing systems with liquid cooled thermal arrays that can pivot freely in three dimensions allowing surfaces to be brought into even, level, and secure contact, thereby preventing air gaps between surfaces and improving thermal performance. In this way, more DUTs can be tested in parallel within a small test space, overall costs of the test system are reduced, and greater cooling capacity can be provided for testing high-powered devices. Gimbaled mounts can be disposed on a bottom surface of individual thermal interface boards (TIBs) of a test system, and/or on top of individual thermal heads of a thermal array (TA) having a common cold plate (or having multiple cold plates).
    Type: Application
    Filed: October 10, 2023
    Publication date: February 1, 2024
    Inventors: Gregory Cruzan, Karthik Ranganathan, Gilberto Oseguera, Joe Koeth, Paul Ferrari, James Hastings, Chee Wah Ho
  • Publication number: 20240027492
    Abstract: A test apparatus comprising a tester interface board (TIB) affixed in a slot of a tester rack, wherein the TIB comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT). The test apparatus further comprises a carrier comprising an array of DUTs, wherein the carrier is operable to slide into the slot of the tester rack, and wherein each DUT in the array of DUTs aligns with a respective socket on the TIB. Further, the test apparatus comprises a plurality of socket covers, wherein each socket cover of the plurality of socket covers is operable to actuate a top portion of each DUT of the array of DUTs in the carrier.
    Type: Application
    Filed: September 30, 2023
    Publication date: January 25, 2024
    Inventors: Karthik Ranganathan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Koji Miyauchi, Keith Schaub, Amit Kucheriya, Kotaro Hasegawa, Yoshiyuki Aoki
  • Patent number: 11841392
    Abstract: A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: December 12, 2023
    Assignee: Advantest Test Solutiions, Inc.
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Rohan Gupte, Homayoun Rezai, Kenneth Santiago, Marc Ghazvini
  • Publication number: 20230393188
    Abstract: Embodiments of the present invention provide a gimbaling socket structure that uses tension to bring a device under test (DUT) disposed in the socket into secure contact with a liquid cooled thermal array or the like to cool the DUT during testing. The gimbaling socket structure is secured to a tension spring and can move freely in 3 dimensions to bring the surfaces of the DUT and the thermal array (or components thereof, such as TEC/ATI layers) into even, level, and secure contact with each other, thereby preventing air gaps between surfaces and improving thermal performance. The even, secure contact between surfaces improves thermal cooling and reduces variation in cooling efficiency. In this way, more DUTs can be tested in parallel within a small test space, overall costs of the test system are reduced, and greater cooling capacity can be provided for testing high-powered devices.
    Type: Application
    Filed: August 16, 2023
    Publication date: December 7, 2023
    Inventors: Gregory Cruzan, Karthik Ranganathan, Gilberto Oseguera, Joe Koeth, Paul Ferrari, James Hastings, Chee Wah Ho
  • Publication number: 20230393190
    Abstract: A testing apparatus includes a tester rack with a plurality of slots where at least one slot in the tester rack is a dedicated slot operable to receive a test interface board (TIB) from a back of the tester rack, where the back of the tester rack is opposite a front of a tester rack, and where the front of the tester rack faces a handler and a front-facing elevator. The apparatus also includes a handler operable to load devices under test (DUTs) onto the TIB and a front-facing elevator move the TIB from the dedicated slot to an available slot in the tester rack, wherein the available slot includes power electronics operable to connect to the TIB to test devices under test (DUT) disposed on the TIB.
    Type: Application
    Filed: June 2, 2022
    Publication date: December 7, 2023
    Inventors: Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera, Kiyokawa Toshiyuki, Shigihara Takayuki
  • Patent number: 11835549
    Abstract: Embodiments of the present invention provide testing systems with liquid cooled thermal arrays that can pivot freely in three dimensions allowing surfaces to be brought into even, level, and secure contact, thereby preventing air gaps between surfaces and improving thermal performance. In this way, more DUTs can be tested in parallel within a small test space, overall costs of the test system are reduced, and greater cooling capacity can be provided for testing high-powered devices. Gimbaled mounts are disposed on a bottom surface of individual thermal interface boards (TIBs) of a test system, and/or on top of individual thermal heads of a thermal array (TA) having a common cold plate (or having multiple cold plates).
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: December 5, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Gregory Cruzan, Karthik Ranganathan, Gilberto Oseguera, Joe Koeth, Paul Ferrari, James Hastings, Chee Wah Ho
  • Patent number: 11821913
    Abstract: A test apparatus comprising a tester interface board (TIB) affixed in a slot of a tester rack, wherein the TIB comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT). The test apparatus further comprises a carrier comprising an array of DUTs, wherein the carrier is operable to slide into the slot of the tester rack, and wherein each DUT in the array of DUTs aligns with a respective socket on the TIB. Further, the test apparatus comprises a plurality of socket covers, wherein each socket cover of the plurality of socket covers is operable to actuate a top portion of each DUT of the array of DUTs in the carrier.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: November 21, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Karthik Ranganathan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Koji Miyauchi, Keith Schaub, Amit Kucheriya, Kotaro Hasegawa, Yoshiyuki Aoki
  • Patent number: 11808812
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack, and wherein each DUT in the array of DUTs aligns with a respective socket of the plurality of sockets on the interface board. The testing apparatus further comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: November 7, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Hiroki Ikeda, Toshiyuki Kiyokawa
  • Publication number: 20230314512
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack, and wherein each DUT in the array of DUTs aligns with a respective socket of the plurality of sockets on the interface board. The testing apparatus further comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 5, 2023
    Inventors: Karthik RANGANATHAN, Gregory CRUZAN, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Hiroki Ikeda, Toshiyuki Kiyokawa
  • Patent number: 11742055
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack; and (c) an array of POP memory devices, wherein each POP memory device is disposed adjacent to a respective DUT in the array of DUTs. Further, the testing apparatus comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: August 29, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal
  • Publication number: 20230236241
    Abstract: Embodiments of the present invention provide testing systems with liquid cooled thermal arrays that can pivot freely in three dimensions allowing surfaces to be brought into even, level, and secure contact, thereby preventing air gaps between surfaces and improving thermal performance. In this way, more DUTs can be tested in parallel within a small test space, overall costs of the test system are reduced, and greater cooling capacity can be provided for testing high-powered devices. Gimbaled mounts are disposed on a bottom surface of individual thermal interface boards (TIBs) of a test system, and/or on top of individual thermal heads of a thermal array (TA) having a common cold plate (or having multiple cold plates).
    Type: Application
    Filed: January 26, 2022
    Publication date: July 27, 2023
    Inventors: Gregory Cruzan, Karthik Ranganathan, Gilberto Oseguera, Joe Koeth, Paul Ferrari, James Hastings, Chee Wah Ho
  • Publication number: 20230228812
    Abstract: An apparatus for thermal control of a device under test (DUT) includes a cooling structure operable to provide cooling, the cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet cooling material via an outlet port thereof, a variable thermal conductance material (VTCM) layer disposed on a surface of the cooling structure, and a heater layer operable to generate heat based on an electronic control, and wherein the VTCM layer is operable to transfer cooling from the cooling structure to the heater layer. A thermal interface material layer is disposed on the heater layer. The thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to the DUT. The apparatus includes a compression mechanism for providing compression to the VTCM layer to vary a thermal conductance of the VTCM layer. The compression mechanism is also for decoupling the VTCM layer from the heater layer.
    Type: Application
    Filed: January 9, 2023
    Publication date: July 20, 2023
    Inventors: Samer Kabbani, Kazuyuki Yamashita, Hiroki Ikeda, Ira Leventhal, Mohammad Ghazvini, Paul Ferrari, Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera
  • Publication number: 20230197185
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack; and (c) an array of POP memory devices, wherein each POP memory device is disposed adjacent to a respective DUT in the array of DUTs. Further, the testing apparatus comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Application
    Filed: February 19, 2023
    Publication date: June 22, 2023
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal
  • Publication number: 20230083634
    Abstract: An automated test equipment (ATE) includes a test interface board assembly. The test interface board includes a socket configured to provide electrical couplings from the test interface board to a device under test (DUT). The socket is further configured to accept an active thermal interposer (ATI) device while the DUT is disposed in the socket. The socket includes a plurality of spring-loaded roller retention devices configured to retain one or more devices in the socket. The ATE further includes a Z-axis interface plate configured to open the plurality of spring-loaded roller retention devices to enable insertion of the DUT into the socket and an ATI placement plate configured to open the plurality of spring-loaded roller retention devices to enable insertion of the ATI device into the socket.
    Type: Application
    Filed: July 29, 2022
    Publication date: March 16, 2023
    Inventors: KARTHIK RANGANATHAN, GILBERTO OSEGUERA, GREGORY CRUZAN, JOE KOETH, IKEDA HIROKI, KIYOKAWA TOSHIYUKI
  • Publication number: 20230062440
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack; and (c) an array of POP memory devices, wherein each POP memory device is disposed adjacent to a respective DUT in the array of DUTs. Further, the testing apparatus comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Application
    Filed: November 9, 2022
    Publication date: March 2, 2023
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal
  • Patent number: 11587640
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack; and (c) an array of POP memory devices, wherein each POP memory device is disposed adjacent to a respective DUT in the array of DUTs. Further, the testing apparatus comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: February 21, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal
  • Patent number: 11549981
    Abstract: An apparatus for thermal control of a device under test (DUT) includes a cooling structure operable to provide cooling, the cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet cooling material via an outlet port thereof, a variable thermal conductance material (VTCM) layer disposed on a surface of the cooling structure, and a heater layer operable to generate heat based on an electronic control, and wherein the VTCM layer is operable to transfer cooling from the cooling structure to the heater layer. A thermal interface material layer is disposed on the heater layer. The thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to the DUT. The apparatus includes a compression mechanism for providing compression to the VTCM layer to vary a thermal conductance of the VTCM layer. The compression mechanism is also for decoupling the VTCM layer from the heater layer.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: January 10, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Samer Kabbani, Kazuyuki Yamashita, Hiroki Ikeda, Ira Leventhal, Mohammad Ghazvini, Paul Ferrari, Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera
  • Patent number: 11493551
    Abstract: A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: November 8, 2022
    Assignee: ADVANTEST TEST SOLUTIONS, INC.
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Rohan Gupte, Homayoun Rezai, Kenneth Santiago, Marc Ghazvini