Abstract: A receiver aboard a communication satellite, designed to detect digital signals arriving in intermittent bursts from a ground station with a bit cadence differing but slightly from a clock frequency f.sub.s generated by a time base on the satellite, comprises a synchronizer controlled by that time base for reorganizing the detected bits into a data frame in step with clock frequency f.sub.s preparatorily to processing and retransmission thereof. The synchronizer samples a square wave of frequency 2f.sub.s substantially at the midpoint of an initial bit period of an incoming signal stream, with the aid of a timing signal extracted from that signal stream, and determines from the sample whether this square wave or an inversion thereof is to be used in establishing the instants of reading of the subsequently received bits. The bits thus read, after interim storage in two cascaded registers, are fed to a data processor in the rhythm of clock frequency f.sub.s.