Abstract: Memory storage devices that employ atomic resolution storage technology are provided. A preferred memory storage device includes a storage medium that defines one or more coverage areas. Each of the coverage areas incorporates a storage area that is configurable in one of a plurality of structural states. Typically, the structural states represent information stored in the storage area. Electron beam emitters electrically communicate with the storage medium, with the storage medium and the emitters being configured to move relative to each other. So configured, each emitter is capable of providing a beam of electrons to a respective one of the coverage areas. The memory storage device also includes a first current source that selectively electrically communicates with at least one of the emitters. Additionally, a control system electrically communicates with the first current source that facilitates a controlled current flow from the first current source to the at least one emitter.

Abstract: Herein described is a device for driving electric motors comprising a power stage with a variable duty-cycle coupled to a supply voltage. The power stage is suitable for driving the electric motor. The driving device comprises a circuit that is capable of raising the value of the input voltage of the power stage above the induced counter electromotive voltage of the motor in certain periods of time and a control device capable of activating said circuit in reply to values of the induced counter electromotive voltage greater than or comparable with the supply voltage.

Abstract: The device and method monitor the current delivered to a load through a power transistor including a sense transistor. The circuit includes a disturbances attenuating circuit that has a differential stage, and first, second and third stages referenced to ground, the respective input nodes of which are connected in common to an output node of the differential stage. The third stage is formed by a transistor identical to a transistor of the first stage and delivers a current signal through a current terminal thereof, proportional to the current being delivered to the load.

Abstract: A driving circuit for piezoelectric actuators comprises a chip of semiconductor material integrating both an interface circuit receiving at input a control signal generated by a control logic unit, and a power circuit driving the piezoelectric actuators. The power circuit is directly connected to the output of the interface circuit.

Abstract: The device and method monitor the current delivered to a load through a power transistor including a sense transistor. The circuit includes a disturbances attenuating circuit that has a differential stage, and first, second and third stages referenced to ground, the respective input nodes of which are connected in common to an output node of the differential stage. The third stage is formed by a transistor identical to a transistor of the first stage and delivers a current signal through a current terminal thereof, proportional to the current being delivered to the load.

Abstract: An electronic device for driving an actuator device for a hard disk and a motor for turning the hard disk, the device having a first driving circuit connected to the rotation motor and integrated in a chip of semiconductor material having a substrate defining a reference-potential region, a second driving circuit integrated in the chip and connected to a first actuation stage of the actuator device, and a third driving circuit integrated in the chip and connected to a second actuation stage of the actuator device. The actuator device supports a read/write transducer of the hard disk. The first actuation stage performs a rough displacement of the read/write transducer, while the second actuation stage performs a finer displacement of the same read/write transducer.

Abstract: A switching device having a first and a second electronic switch connected in a half-bridge configuration and each having a control terminal for receiving a switching signal alternatively having a turn-on value and a turn-off value for taking the first and second electronic switches to an on state and to an off state, respectively; the switching device includes, for each switch, means for detecting the state of the switch and means for keeping the switching signal at the turn-off value for one of the electronic switches when the detected state of the other electronic switch is the on state.

Abstract: A voltage, replica of the difference between two dissimilar base-emitter voltages in the form of an intrinsic input offset voltage of a differential input pair of transistors of a noninverting, buffer-configured operational amplifier, is summed with a pre-established fraction of a base-emitter voltage, to produce a voltage reference without thermal drift of a level that can be as low as few 10 mV. The intrinsic input offset voltage is controlled by a local feedback loop acting on the bias current that is forced through the input pair of transistors that may be realized with a certain area ratio. The relatively simple circuit is useful in battery operated, low supply voltage, systems.

Abstract: A suppression method is applied to an integrated circuit formed on a substrate of p-type material having at least one region of n-type material with junction isolation, a first electrical contact on the frontal surface of the substrate, a second electrical contact on the n-type region and a third electrical contact on the back of the substrate connected to a reference (ground) terminal of the integrated circuit. To avoid current in the substrate due to the conduction of parasitic bipolar transistors in certain operating conditions of the integrated circuit, the method provides for monitoring the potential of the second contact to detect if this potential departs from the (ground) potential of the reference terminal by an amount greater than a predetermined threshold value. If this occurs the first contact is taken to the potential of the second contact, otherwise they are held at the (ground) potential of the reference terminal. A device and an integrated circuit which utilize the method are also described.

Abstract: A driver circuit for controlling a piezoelectric actuator in a charge mode includes an amplifier having a first input terminal for receiving a control voltage, a second input terminal, and a main final stage with a main output terminal connected to the piezoelectric actuator. The amplifier also includes an additional final stage with an additional output terminal connected to the second input terminal. The main final stage and the additional final stage are connected in parallel with one another so that a current which passes through the main output terminal is proportional in accordance with a predefined factor to a current which passes through the additional output terminal. The driver circuit includes a device having a constant capacitance connected to the second input terminal so that an electrical charge transferred to the piezoelectric actuator is correlated with the control voltage in accordance with the predefined factor and the capacitance.

Abstract: A dual supply device having a reference terminal, an input terminal for the application of a substantially constant input voltage relative to the reference terminal, a first output terminal for supplying a first supply voltage different from the input voltage, a second output terminal for supplying a second supply voltage substantially opposite to the first supply voltage a direct-current/direct-current converter connected between the input terminal and the first output terminal for converting the input voltage into the first supply voltage, and a capacitive translator connected between the first and second output terminals for translating the first supply voltage into the second supply voltage.

Abstract: A suppression method is applied to an integrated circuit formed on a substrate of p-type material having at least one region of n-type material with junction isolation, a first electrical contact on the frontal surface of the substrate, a second electrical contact on the n-type region and a third electrical contact on the back of the substrate connected to a reference (ground) terminal of the integrated circuit. To avoid current in the substrate due to the conduction of parasitic bipolar transistors in certain operating conditions of the integrated circuit, the method provides for monitoring the potential of the second contact to detect if this potential departs from the (ground) potential of the reference terminal by an amount greater than a predetermined threshold value. If this occurs the first contact is taken to the potential of the second contact, otherwise they are held at the (ground) potential of the reference terminal. A device and an integrated circuit which utilize the method are also described.

Abstract: A circuit for modifying a resonant frequency of a receiver for radio frequency signals. The receiver includes an inductor connected in parallel with a capacitor. The circuit includes a switch having an additional capacitor connected between two MOS transistors, the switch being connected in parallel with the receiver to add capacitance based on a control of the MOS transistors.

Abstract: The switch of this invention has two conduction terminals and basically consists of the parallel coupling, across the two conduction terminals, of a first N-channel MOS transistor and second P-channel MOS transistor. The first MOS transistor will be conducting when the signal applied to the conduction terminals has a first polarity, and the second MOS transistor will be conducting when the signal applied to the conduction terminals has a second polarity. Advantageously, if two unidirectional conduction circuit elements are respectively connected in series with the main conduction paths of the two MOS transistors, the drain/body junctions of the latter will never be conducting regardless of the way the switch is connected.