Patents by Inventor Giuseppe Cantone
Giuseppe Cantone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11881759Abstract: A circuit includes a current path and a negative bootstrap circuitry coupled to the current path. The current path is coupled between a floating voltage and a reference ground, and includes a current generator coupled through a resistor to the floating voltage at a first node of the current generator. The current generator is controlled by a pulse signal. The negative bootstrap circuitry includes a pump capacitor coupled to a second node of the current generator and to the reference ground. The pump capacitor is configured to provide a negative voltage at the second node of the current generator based on the pulse signal.Type: GrantFiled: August 15, 2022Date of Patent: January 23, 2024Assignee: STMICROELECTRONICS S.r.l.Inventors: Fabrizio Bognanni, Giovanni Caggegi, Giuseppe Cantone, Vincenzo Marano, Francesco Pulvirenti
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Patent number: 11791815Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.Type: GrantFiled: October 4, 2022Date of Patent: October 17, 2023Assignee: STMicroelectronics S.r.l.Inventors: Marco Giovanni Fontana, Marco Riva, Francesco Pulvirenti, Giuseppe Cantone
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Publication number: 20230040189Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.Type: ApplicationFiled: October 4, 2022Publication date: February 9, 2023Applicant: STMicroelectronics S.r.l.Inventors: Marco Giovanni Fontana, Marco Riva, Francesco Pulvirenti, Giuseppe Cantone
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Publication number: 20220393567Abstract: A circuit includes a current path and a negative bootstrap circuitry coupled to the current path. The current path is coupled between a floating voltage and a reference ground, and includes a current generator coupled through a resistor to the floating voltage at a first node of the current generator. The current generator is controlled by a pulse signal. The negative bootstrap circuitry includes a pump capacitor coupled to a second node of the current generator and to the reference ground. The pump capacitor is configured to provide a negative voltage at the second node of the current generator based on the pulse signal.Type: ApplicationFiled: August 15, 2022Publication date: December 8, 2022Applicant: STMICROELECTRONICS S.r.l.Inventors: Fabrizio BOGNANNI, Giovanni CAGGEGI, Giuseppe CANTONE, Vincenzo MARANO, Francesco PULVIRENTI
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Patent number: 11476845Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.Type: GrantFiled: June 22, 2021Date of Patent: October 18, 2022Assignee: STMicroelectronics S.r.l.Inventors: Marco Giovanni Fontana, Marco Riva, Francesco Pulvirenti, Giuseppe Cantone
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Patent number: 11451130Abstract: A circuit includes a current path and a negative bootstrap circuitry coupled to the current path. The current path is coupled between a floating voltage and a reference ground, and includes a current generator coupled through a resistor to the floating voltage at a first node of the current generator. The current generator is controlled by a pulse signal. The negative bootstrap circuitry includes a pump capacitor coupled to a second node of the current generator and to the reference ground. The pump capacitor is configured to provide a negative voltage at the second node of the current generator based on the pulse signal.Type: GrantFiled: April 13, 2021Date of Patent: September 20, 2022Assignee: STMICROELECTRONICS S.r.l.Inventors: Fabrizio Bognanni, Giovanni Caggegi, Giuseppe Cantone, Vincenzo Marano, Francesco Pulvirenti
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Publication number: 20220006450Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.Type: ApplicationFiled: June 22, 2021Publication date: January 6, 2022Inventors: Marco Giovanni Fontana, Marco Riva, Francesco Pulvirenti, Giuseppe Cantone
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Publication number: 20210351686Abstract: A circuit includes a current path and a negative bootstrap circuitry coupled to the current path. The current path is coupled between a floating voltage and a reference ground, and includes a current generator coupled through a resistor to the floating voltage at a first node of the current generator. The current generator is controlled by a pulse signal. The negative bootstrap circuitry includes a pump capacitor coupled to a second node of the current generator and to the reference ground. The pump capacitor is configured to provide a negative voltage at the second node of the current generator based on the pulse signal.Type: ApplicationFiled: April 13, 2021Publication date: November 11, 2021Applicant: STMICROELECTRONICS S.r.l.Inventors: Fabrizio BOGNANNI, Giovanni CAGGEGI, Giuseppe CANTONE, Vincenzo MARANO, Francesco PULVIRENTI
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Patent number: 10110399Abstract: A circuit with galvanic isolation includes a series of n cascaded transformers including a first transformer and a last transformer in the series. A transmitter is coupled to the primary winding of the first transformer in the series of cascaded transformers, the transmitter being configured for supplying to the primary winding a transmission signal as a function of an input signal. A receiver is coupled to the secondary winding of the last transformer of the series of cascaded transformers and is configured for receiving at the secondary winding a reception signal transmitted over the series of cascaded transformers. A predistortion module is configured for applying to the transmission signal a predistortion including an (n?1)-fold integration, where n is the number of cascaded transformers, of a transmission signal that would be supplied to the input of a sole transformer present in a single-transformer solution.Type: GrantFiled: May 22, 2017Date of Patent: October 23, 2018Assignee: STMicroelectronics S.r.l.Inventors: Alessandro Nizza, Roberto Aletti, Francesco Pulvirenti, Giuseppe Cantone
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Patent number: 10084446Abstract: A circuit provides a high-voltage low-drop diode-like conductive path between a DC voltage supply terminal and a bootstrap terminal in charging a supply capacitor for driving a power switch with the capacitor set between the bootstrap terminal and an output terminal alternatively switchable between a low voltage and a high voltage DC voltage. In an embodiment, the circuit includes first and second transistors such as LDMOS depletion transistors with the first transistor set in a cascode arrangement between the bootstrap terminal and the DC voltage supply terminal and the second transistor coupled with a sense comparator for comparing the voltage at the bootstrap terminal with the voltage at said DC voltage supply terminal. The first and second transistors have common control terminals coupled with the DC voltage supply terminal and common coupling terminals to the bootstrap terminal.Type: GrantFiled: May 24, 2016Date of Patent: September 25, 2018Assignee: STMicroelectronics S.r.l.Inventors: Giovanni Caggegi, Francesco Pulvirenti, Giuseppe Cantone, Vincenzo Palumbo
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Publication number: 20180102922Abstract: A circuit with galvanic isolation includes a series of n cascaded transformers including a first transformer and a last transformer in the series. A transmitter is coupled to the primary winding of the first transformer in the series of cascaded transformers, the transmitter being configured for supplying to the primary winding a transmission signal as a function of an input signal. A receiver is coupled to the secondary winding of the last transformer of the series of cascaded transformers and is configured for receiving at the secondary winding a reception signal transmitted over the series of cascaded transformers. A predistortion module is configured for applying to the transmission signal a predistortion including an (n?1)-fold integration, where n is the number of cascaded transformers, of a transmission signal that would be supplied to the input of a sole transformer present in a single-transformer solution.Type: ApplicationFiled: May 22, 2017Publication date: April 12, 2018Inventors: Alessandro Nizza, Roberto Aletti, Francesco Pulvirenti, Giuseppe Cantone
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Publication number: 20170141775Abstract: A circuit provides a high-voltage low-drop diode-like conductive path between a DC voltage supply terminal and a bootstrap terminal in charging a supply capacitor for driving a power switch with the capacitor set between the bootstrap terminal and an output terminal alternatively switchable between a low voltage and a high voltage DC voltage. In an embodiment, the circuit includes first and second transistors such as LDMOS depletion transistors with the first transistor set in a cascode arrangement between the bootstrap terminal and the DC voltage supply terminal and the second transistor coupled with a sense comparator for comparing the voltage at the bootstrap terminal with the voltage at said DC voltage supply terminal. The first and second transistors have common control terminals coupled with the DC voltage supply terminal and common coupling terminals to the bootstrap terminal.Type: ApplicationFiled: May 24, 2016Publication date: May 18, 2017Inventors: Giovanni Caggegi, Francesco Pulvirenti, Giuseppe Cantone, Vincenzo Palumbo
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Patent number: 8208518Abstract: An electronic synchronous/asynchronous transceiver device for power line communication networks is integrated into a single chip and operates from a single supply voltage. The transceiver device includes: at least an internal register that is programmable through a synchronous serial interface; at least a line driver for a two-way network communication over power lines implemented by a single ended power amplifier with direct accessible input and output lines that is part of a tunable active filter for the transmission path; and at least a couple of linear regulators for powering with different voltage levels different kind of external controllers linked to the transceiver device.Type: GrantFiled: September 16, 2008Date of Patent: June 26, 2012Assignees: STMicroelectronics S.r.l., Dora S.p.A.Inventors: Roberto Cappelletti, Giuseppe Cantone, Barbara Antonelli, Antonello Castigliola, Alessandro Lasciandare, Vincenzo Marano
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Publication number: 20090074041Abstract: An electronic synchronous/asynchronous transceiver device for power line communication networks is integrated into a single chip and operates from a single supply voltage. The transceiver device includes: at least an internal register that is programmable through a synchronous serial interface; at least a line driver for a two-way network communication over power lines implemented by a single ended power amplifier with direct accessible input and output lines that is part of a tunable active filter for the transmission path; and at least a couple of linear regulators for powering with different voltage levels different kind of external controllers linked to the transceiver device.Type: ApplicationFiled: September 16, 2008Publication date: March 19, 2009Applicants: STMicroelectronics S.r.l., DORA S.p.A.Inventors: Roberto Cappelletti, Giuseppe Cantone, Barbara Antonelli, Antonello Castigliola, Alessandro Lasciandare, Vincenzo Marano
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Patent number: 6950460Abstract: A data transceiving station of digital data frames includes a digital modem coupled to a transmission line, and a microprocessor receiving demodulated data from the modem according to a Packet Mode or a Bit Mode transmission through an interface circuit. The interface circuit switches between the Packet Mode and the Bit Mode transmission during transfer of a data frame to the microprocessor. The data transceiving station combines the superior speed of a Packet Mode transfer with the unlimited compatibility of a Bit Mode transfer.Type: GrantFiled: October 27, 2000Date of Patent: September 27, 2005Assignee: STMicroelectronics S.r.l.Inventors: Roberto Cappelletti, Giuseppe Cantone
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Patent number: 6675360Abstract: Functions for simulating, burning and controlling integrated fuses of a device are provided by a dedicated circuit which, instead of differing from other circuits, is integrated by sharing part of the registers with the circuit that normally exists to scan test the integrity of the state of the device. The architecture is simplified and only requires an additional pin as compared to a common scan test circuit.Type: GrantFiled: November 21, 2000Date of Patent: January 6, 2004Assignee: STMicroelectronics S.r.l.Inventors: Giuseppe Cantone, Roberto Cappelletti
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Patent number: 6617965Abstract: A method for controlling the level of a signal produced by a transceiver of digital data coupled to a power distribution line during a transmission phase is provided. The level of the signal output by the transceiver is regulated by comparing the current level of the output signal with a predetermined minimum threshold and a predetermined maximum threshold, reducing the current level when the maximum threshold is exceeded by reducing the gain, and switching to a voltage mode control of the output signal when the current level of the output signal becomes lower than the minimum threshold.Type: GrantFiled: September 29, 2000Date of Patent: September 9, 2003Assignee: STMicroelectronics S.r.l.Inventors: Giuseppe Cantone, Roberto Cappelletti
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Patent number: 6150867Abstract: An integrated device for a switching system is disclosed. The device includes control circuitry for generating at least one switching control signal, reference circuitry for generating at least one reference quantity, a using circuit for using the reference quantity, a circuit for storing the reference quantity, and a switch which, in a first operative condition, connects the reference circuit to the using circuit and to the storage circuit in order to apply the reference quantity thereto. In a second operative condition, the switch disconnects the reference circuit from the using circuit and connects the storage circuit to the using circuit in order to apply the stored reference quantity thereto. Finally, the device includes filtering circuitry for keeping the switch in the second operative condition for a filtering period in accordance with the switching of the control signal.Type: GrantFiled: August 7, 1998Date of Patent: November 21, 2000Assignee: STMicroelectronics, S.r.l.Inventors: Angelo Genova, Giuseppe Cantone, Roberto Gariboldi
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Patent number: 6107758Abstract: A circuit is described with which an operation circuit for a discharge lamp can be switched between operation states with different lamp currents by hort interruptions of the power supply. Long interruptions than a certain time threshold result in basic state operation.Type: GrantFiled: September 23, 1999Date of Patent: August 22, 2000Assignees: Patent-Treuhand-Gesellschaft fuer elektrische Gluehlampen mbH, STMicroelectronics S.r.l.Inventors: Klaus Fischer, Roberto Gariboldi, Giuseppe Cantone
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Patent number: 6075391Abstract: A circuit for charging a capacitance using an LDMOS integrated transistor functioning as a source follower and controlled, in a manner to emulate a high voltage charging diode of the capacitance. The LDMOS transistor is controlled via a bootstrap capacitor charged by a diode at the supply voltage of the circuit, and by an inverter driven by a logic control circuit as a function of a Low Gate Drive Signal and of a second logic signal which is active during a phase wherein the supply voltage is lower than the minimum switch-on voltage of the integrated circuit. The circuit uses a first zener diode to charge the bootstrap capacitor and the source of the transistor is connected to the supply node through a second zener diode.Type: GrantFiled: June 11, 1998Date of Patent: June 13, 2000Assignee: STMicroelectronics S.r.l.Inventors: Mario Tarantola, Giuseppe Cantone, Angelo Genova, Roberto Gariboldi