Abstract: The present disclosure relates to a fluid cooled electric machine, and a method for producing the same. The fluid cooled electric machine includes a shaft extending along an axis of the machine, a rotor rotationally coupled to the shaft, a stator radially surrounding the rotor and having a stator core, first and second end shields mounted at opposite ends of the electric machine in the axial direction, and a fluid cooling system for cooling the electric machine, the stator core having a plurality of axial cavities, the fluid cooling system including first and second collector bodies, each including a plurality of collector chambers for the fluid, and a plurality of pipes.

Abstract: Disclosed herein is a method that comprises applying a first voltage to a memory cell, applying again the first voltage to the memory cell when the memory cell have not been shifted to an erased condition, and applying a second voltage to the memory cell when the memory cell have not still been shifted to an erased condition, the second voltage being higher than the first voltage.

Abstract: A device includes a NAND flash memory, and a generic command interface configured to interpret both an Open NAND Flash Interface specification and a first NAND flash specification to perform an associated one of command operations on the NAND flash memory, the Open NAND Flash Interface specification and the first NAND flash specification being different from each other.

Abstract: Disclosed herein is a method that comprises applying a first voltage to a memory cell, applying again the first voltage to the memory cell when the memory cell have not been shifted to an erased condition, and applying a second voltage to the memory cell when the memory cell have not still been shifted to an erased condition, the second voltage being higher than the first voltage.

Abstract: Disclosed herein is a method that comprises applying a first voltage to a memory cell, applying again the first voltage to the memory cell when the memory cell have not been shifted to an erased condition, and applying a second voltage to the memory cell when the memory cell have not still been shifted to an erased condition, the second voltage being higher than the first voltage.

Abstract: A logic circuit for a semiconductor memory device, includes a first logic portion which stores data from a first data signal, and generates a second data signal based on the first data signal, a second logic portion which generates a first address signal and stores an address from the first address signal where data from the second data signal is to be written, and a third logic portion which generates a flag signal which indicates whether the data stored in the first logic portion is valid.

Abstract: A logic circuit for a semiconductor memory device, includes a first logic portion which stores data from a first data signal, and generates a second data signal based on the first data signal, a second logic portion which generates a first address signal and stores an address from the first address signal where data from the second data signal is to be written, and a third logic portion which generates a flag signal which indicates whether the data stored in the first logic portion is valid.

Abstract: Disclosed herein is a method that comprises applying a first voltage to a memory cell, applying again the first voltage to the memory cell when the memory cell have not been shifted to an erased condition, and applying a second voltage to the memory cell when the memory cell have not still been shifted to an erased condition, the second voltage being higher than the first voltage.

Abstract: A rotor for a rotating electric machine, having at least a pair of cavities with a bottom wall from which a first lateral wall and a second lateral wall extend transversally, wherein each cavity is suitable for receiving therein a respective lateral portion of a winding of the rotor through an insertion opening that extends facing the bottom wall from the first lateral wall to the second lateral wall. The rotor includes blocking means suitable for blocking the lateral portions of the winding in the respective pair of cavities by operatively coupling with coupling means defined in the rotor.