Patents by Inventor Glen David Wilk

Glen David Wilk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7253063
    Abstract: A semiconductor device having composite dielectric layer formed between a silicon substrate and a gate electrode. The composite gate dielectric layer including a layer of silicon oxide, SiOx?2, having a dielectric constant of greater than about 3.9 and about 12 or less, and a complementary dielectric layer for inhibiting the flow of leakage current through the composite dielectric layer.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: August 7, 2007
    Assignee: Lucent Technologies Inc.
    Inventors: David A Muller, Gregory L. Timp, Glen David Wilk
  • Patent number: 7223677
    Abstract: The present invention provides a method for manufacturing a semiconductor device comprising an insulating layer that includes a seed layer formed on a silicon substrate. The seed layer is formed by exposing a hydrogen-terminated surface of the silicon substrate in a substantially oxygen-free environment to a seed layer precursor comprising a methylated metal. Forming the insulating layer further includes depositing a dielectric material on the seed layer.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: May 29, 2007
    Assignee: Agere Systems, Inc.
    Inventors: Martin Michael Frank, Yves Chabal, Glen David Wilk, Martin L. Green
  • Publication number: 20040241947
    Abstract: The present invention provides a method for manufacturing a semiconductor device comprising a III-V semiconductor substrate, and an insulating layer deposited on the substrate by Atomic Layer Deposition (ALD). The use of ALD to deposit the insulating layer was found to facilitate the creation of active devices that avoid Fermi layer pinning. In addition, such insulating layer may be advantageously used as a passivation layer in III-V substrate based active devices and transistors.
    Type: Application
    Filed: June 17, 2004
    Publication date: December 2, 2004
    Applicant: Agere Systems, Inc.
    Inventors: Glen David Wilk, Peide Ye
  • Patent number: 6825538
    Abstract: The present invention provides a method for manufacturing a semiconductor device comprising an insulating layer that includes a seed layer formed on a substrate. The seed layer is formed by removing hydrogen forming the substrate, depositing a seed layer precursor and exposing the precursor to excited atoms to form a seed layer on the substrate.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: November 30, 2004
    Assignee: Agere Systems Inc.
    Inventors: Martin Michael Frank, Yves Chabal, Glen David Wilk
  • Publication number: 20040235313
    Abstract: The present invention provides a method for manufacturing a semiconductor device comprising an insulating layer that includes a seed layer formed on a silicon substrate. The seed layer is formed by exposing a hydrogen-terminated surface of the silicon substrate in a substantially oxygen-free environment to a seed layer precursor comprising a methylated metal. Forming the insulating layer further includes depositing a dielectric material on the seed layer.
    Type: Application
    Filed: June 24, 2004
    Publication date: November 25, 2004
    Applicant: Agere Systems, Inc.
    Inventors: Martin Michael Frank, Yves Chabal, Glen David Wilk, Martin L. Green
  • Patent number: 6770536
    Abstract: The present invention provides a method for manufacturing a semiconductor device comprising a III-V semiconductor substrate, and an insulating layer deposited on the substrate by Atomic Layer Deposition (ALD). The use of ALD to deposit the insulating layer was found to facilitate the creation of active devices that avoid Fermi layer pinning. In addition, such insulating layer may be advantageously used as a passivation layer in III-V substrate based active devices and transistors.
    Type: Grant
    Filed: October 3, 2002
    Date of Patent: August 3, 2004
    Assignee: Agere Systems Inc.
    Inventors: Glen David Wilk, Peide Ye
  • Publication number: 20040099889
    Abstract: The present invention provides a method for manufacturing a semiconductor device comprising an insulating layer that includes a seed layer formed on a silicon substrate. The seed layer is formed by exposing a hydrogen-terminated surface of the silicon substrate in a substantially oxygen-free environment to a seed layer precursor comprising a methylated metal. Forming the insulating layer further includes depositing a dielectric material on the seed layer.
    Type: Application
    Filed: November 27, 2002
    Publication date: May 27, 2004
    Applicant: Agere Systems, Inc.
    Inventors: Martin Michael Frank, Yves Chabal, Glen David Wilk, Martin L. Green
  • Publication number: 20040094809
    Abstract: The present invention provides a method for manufacturing a semiconductor device comprising an insulating layer that includes a seed layer formed on a substrate. The seed layer is formed by removing hydrogen from the substrate, depositing a seed layer precursor and exposing the precursor to excited atoms to form a seed layer on the substrate. In addition to serving as a template for the growth of a high K dielectric layer, the seed layer retards the undesirable oxidation of the silicon surface thereby improving the performance of active devices that include the insulating layer.
    Type: Application
    Filed: November 20, 2002
    Publication date: May 20, 2004
    Applicant: Agere Systems, Inc.
    Inventors: Martin Michael Frank, Yves Chabal, Glen David Wilk
  • Patent number: 6723581
    Abstract: The present invention provides a method of manufacturing a semiconductor device comprising, providing a semiconductor substrate, forming a substantially-hydroxylated SiOxHy layer on the semiconductor substrate in a presence of oxygen and hydrogen, and forming a metallic oxide, high-K dielectric layer on the substantially-hydroxylated SiOxHy layer. The substantially-hydroxylated SiOxHy layer has a surface concentration of hydroxyl (OH) species equal to or greater than about 3×1014 hydroxyl per cm2.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: April 20, 2004
    Assignee: Agere Systems Inc.
    Inventors: Yves Jean Chabal, Martin Laurence Green, Glen David Wilk
  • Publication number: 20040067660
    Abstract: The present invention provides a method for manufacturing a semiconductor device comprising a III-V semiconductor substrate, and an insulating layer deposited on the substrate by Atomic Layer Deposition (ALD). The use of ALD to deposit the insulating layer was found to facilitate the creation of active devices that avoid Fermi layer pinning. In addition, such insulating layer may be advantageously used as a passivation layer in III-V substrate based active devices and transistors.
    Type: Application
    Filed: October 3, 2002
    Publication date: April 8, 2004
    Applicant: Agere Systems, Inc.
    Inventors: Glen David Wilk, Peide Ye
  • Patent number: 6560377
    Abstract: A lithium niobate-based electro-optic device is formed to include a parylene conformal coating layer, as a sealant against moisture. The use of parylene (preferably, parylene-C) has been found to form an acceptable moisture vapor barrier without the need for additional hermetic packaging of the electro-optic device.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: May 6, 2003
    Assignee: Agere Systems Inc.
    Inventors: Christopher D. W. Jones, Glen David Wilk
  • Publication number: 20030063830
    Abstract: A lithium niobate-based electro-optic device is formed to include a parylene conformal coating layer, as a sealant against moisture. The use of parylene (preferably, parylene-C) has been found to form an acceptable moisture vapor barrier without the need for additional hermetic packaging of the electro-optic device.
    Type: Application
    Filed: October 1, 2001
    Publication date: April 3, 2003
    Inventors: Christopher D. W. Jones, Glen David Wilk
  • Publication number: 20030017715
    Abstract: A semiconductor device having composite dielectric layer formed between a silicon substrate and a gate electrode. The composite gate dielectric layer including a layer of silicon oxide, SiOx≦2, having a dielectric constant of greater than about 3.9 and about 12 or less, and a complementary dielectric layer for inhibiting the flow of leakage current through the composite dielectric layer.
    Type: Application
    Filed: August 23, 2002
    Publication date: January 23, 2003
    Inventors: David A. Muller, Gregory L. Timp, Glen David Wilk
  • Patent number: 6495474
    Abstract: A method of fabricating a semiconductor device having a gate dielectric layer. The method includes the step of ion implanting at least one of Zr, Hf, La, Y, Al, Ti and Ta into the gate dielectric layer at low implant energy level to increase the dielectric constant of the dielectric layer. Subsequently, the implanted gate dielectric layer is annealed.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: December 17, 2002
    Assignee: Agere Systems Inc.
    Inventors: Conor Stefan Rafferty, Glen David Wilk
  • Patent number: 6479404
    Abstract: A process for forming a metal oxide or a metal silicate gate dielectric layer on a semiconductor substrate is disclosed. A suitably prepared substrate is placed in a chamber. An organic precursor gas is flowed into the chamber. An inorganic precursor gas is then flowed into the chamber. The organic precursor gas catalyzes a reaction between itself, the inorganic precursor and the substrate to form a dielectric layer on the substrate.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: November 12, 2002
    Assignee: Agere Systems Inc.
    Inventors: Michael Steigerwald, Glen David Wilk
  • Publication number: 20020102797
    Abstract: A semiconductor device having composite dielectric layer formed between a silicon substrate and a gate electrode. The composite gate dielectric layer including a layer of silicon oxide, SiOX≦2, having a dielectric constant of greater than about 3.9 and about 12 or less, and a complementary dielectric layer for inhibiting the flow of leakage current through the composite dielectric layer.
    Type: Application
    Filed: February 1, 2001
    Publication date: August 1, 2002
    Inventors: David A. Muller, Gregory L. Timp, Glen David Wilk