Abstract: A method of making a memory device comprising a base; a capacitor comprising a ferroelectric layer and at least two electrically conductive layers, the ferroelectric layer being located between the at least two electrically conductive layers; each of the at least two conductive layers being operatively connected to a current source; a cantilever attached to the base at first end and movable at a second end, the ferroelectric capacitor being mounted to the cantilever such that the second end of the cantilever moves a predetermined displacement upon application of a current to the ferroelectric layer which induces deformation of the ferroelectric layer thereby causing displacement of the cantilever which is operatively associated with a contact so that an electrical connection is enabled with the contact upon the predetermined displacement of the cantilever. The presence or absence of a connection forms two states of a memory cell.

Abstract: A ferroelectric device comprising a substrate; a textured layer; a first electrode comprising a thin layer of metallic material having a crystal lattice structure divided into granular regions; a seed layer; the seed layer being epitaxially deposited so as to form a column-like structure on top of the granular regions of the first electrode; at least one ferroelectric material layer exhibiting spontaneous polarization epitaxially deposited on the seed layer; the ferroelectric material layer, the seed layer, and first electrode each having granular regions in which column-like structures produce a high degree of polarization normal to the growth plane and a method of making.

Abstract: A method of making a memory device comprising a base; a capacitor comprising a ferroelectric layer and at least two electrically conductive layers, the ferroelectric layer being located between the at least two electrically conductive layers; each of the at least two conductive layers being operatively connected to a current source; a cantilever attached to the base at first end and movable at a second end, the ferroelectric capacitor being mounted to the cantilever such that the second end of the cantilever moves a predetermined displacement upon application of a current to the ferroelectric layer which induces deformation of the ferroelectric layer thereby causing displacement of the cantilever which is operatively associated with a contact so that an electrical connection is enabled with the contact upon the predetermined displacement of the cantilever. The presence or absence of a connection forms two states of a memory cell.

Abstract: A memory device comprising a base; a capacitor comprising a ferroelectric layer and at least two electrically conductive layers, the ferroelectric layer being located between the at least two electrically conductive layers; each of the at least two conductive layers being operatively connected to a current source; a cantilever attached to the base at first end and movable at a second end, the ferroelectric capacitor being mounted to the cantilever such that the second end of the cantilever moves a predetermined displacement upon application of a current to the ferroelectric layer which induces deformation of the ferroelectric layer thereby causing displacement of the cantilever which is operatively associated with a contact so that an electrical connection is enabled with the contact upon the predetermined displacement of the cantilever. The presence or absence of a connection forms two states of a memory cell.

Abstract: A memory device comprising a base; a capacitor comprising a ferroelectric layer and at least two electrically conductive layers, the ferroelectric layer being located between the at least two electrically conductive layers; each of the at least two conductive layers being operatively connected to a current source; a cantilever attached to the base at first end and movable at a second end, the ferroelectric capacitor being mounted to the cantilever such that the second end of the cantilever moves a predetermined displacement upon application of a current to the ferroelectric layer which induces deformation of the ferroelectric layer thereby causing displacement of the cantilever which is operatively associated with a contact so that an electrical connection is enabled with the contact upon the predetermined displacement of the cantilever. The presence or absence of a connection forms two states of a memory cell.

Abstract: A method for forming an electrical device having a {100}-textured platinum electrode comprising: depositing a textured metal thin film onto a substrate; thermally oxidizing the metal thin film by annealing to convert it to a rocksalt structure oxide with a {100}-texture; depositing a platinum film layer; depositing a ferroelectric film. An electrical device comprising a substrate; a textured layer formed on the substrate comprising metal oxide having a rocksalt structure; a first electrode film layer having a crystallographic texture acting as a template; and at least one ferroelectric material layer exhibiting spontaneous polarization epitaxially deposited on the first electrode film layer whereby the rocksalt structure of the textured layer facilitates the growth of the first electrode film layer with a {100} orientation which forms a template for the epitaxial deposition of the ferroelectric layer such that the ferroelectric layer is formed with an {001} orientation.

Abstract: A ferroelectric device comprising a substrate; a textured layer; a first electrode comprising a thin layer of metallic material having a crystal lattice structure divided into granular regions; a seed layer; the seed layer being epitaxially deposited so as to form a column-like structure on top of the granular regions of the first electrode; at least one ferroelectric material layer exhibiting spontaneous polarization epitaxially deposited on the seed layer; the ferroelectric material layer, the seed layer, and first electrode each having granular regions in which column-like structures produce a high degree of polarization normal to the growth plane and a method of making.

Abstract: A ferroelectric device comprising a substrate; a textured layer; a first electrode comprising a thin layer of metallic material having a crystal lattice structure divided into granular regions; a seed layer; the seed layer being epitaxially deposited so as to form a column-like structure on top of the granular regions of the first electrode; at least one ferroelectric material layer exhibiting spontaneous polarization epitaxially deposited on the seed layer; the ferroelectric material layer, the seed layer, and first electrode each having granular regions in which column-like structures produce a high degree of polarization normal to the growth plane and a method of making.

Abstract: A method for forming an electrical device having a {100}-textured platinum electrode comprising: depositing a textured metal thin film onto a substrate; thermally oxidizing the metal thin film by annealing to convert it to a rocksalt structure oxide with a {100}-texture; depositing a platinum film layer; depositing a ferroelectric film. An electrical device comprising a substrate; a textured layer formed on the substrate comprising metal oxide having a rocksalt structure; a first electrode film layer having a crystallographic texture acting as a template; and at least one ferroelectric material layer exhibiting spontaneous polarization epitaxially deposited on the first electrode film layer whereby the rocksalt structure of the textured layer facilitates the growth of the first electrode film layer with a {100} orientation which forms a template for the epitaxial deposition of the ferroelectric layer such that the ferroelectric layer is formed with an {001} orientation.

Abstract: Ferroelectric memory cells (3) are presented, in which a cell resistor (R) is integrated into the cell capacitor (C) to inhibit charge accumulation or charge loss at the cell storage node (SN) when the cell (3) is not being accessed while avoiding significant disruption of memory cell access operations. Methods (100, 200) are provided for fabricating ferroelectric memory cells (3) and ferroelectric capacitors (C), in which a parallel resistance (R) is integrated in the capacitor ferroelectric material (20) or in an encapsulation layer (46) formed over the patterned capacitor structure (C).

Abstract: Ferroelectric memory cells (3) are presented, in which a cell resistor (R) is integrated into the cell capacitor (C) to inhibit charge accumulation or charge loss at the cell storage node (SN) when the cell (3) is not being accessed while avoiding significant disruption of memory cell access operations. Methods (100, 200) are provided for fabricating ferroelectric memory cells (3) and ferroelectric capacitors (C), in which a parallel resistance (R) is integrated in the capacitor ferroelectric material (20) or in an encapsulation layer (46) formed over the patterned capacitor structure (C).

Abstract: A method of fabricating a semiconductor device having a ferroelectric capacitor includes the steps of forming a lower electrode layer of the ferroelectric capacitor on an insulation film covering an active device element, forming a ferroelectric film on the lower electrode layer as a capacitor insulation film, crystallizing the ferroelectric film by applying a thermal annealing process in an atmosphere containing a non-oxidizing gas and an oxidizing gas, and forming an upper electrode layer on the ferroelectric film.

Abstract: A platinum deposition method uses a combination of an oxide adhesion layer and a high temperature thin film deposition process to produce platinum bottom electrodes for ferroelectric capacitors. The platinum bottom electrode is deposited onto a TiOx layer at temperatures between about 300 and 800° C. Deposition at high temperatures changes the platinum stress from compressive to tensile, increases platinum grain size, and provides a more thermally stable substrate for subsequent PZT deposition.

Abstract: A method of fabricating a semiconductor device having a ferroelectric capacitor includes the steps of forming a lower electrode layer of the ferroelectric capacitor on an insulation film covering an active device element, forming a ferroelectric film on the lower electrode layer as a capacitor insulation film, crystallizing the ferroelectric film by applying a thermal annealing process in an atmosphere containing a non-oxidizing gas and an oxidizing gas, and forming an upper electrode layer on the ferroelectric film.

Abstract: A method of fabricating a semiconductor device having a ferroelectric capacitor includes the steps of forming a lower electrode layer of the ferroelectric capacitor on an insulation film covering an active device element, forming a ferroelectric film on the lower electrode layer as a capacitor insulation film, crystallizing the ferroelectric film by applying a thermal annealing process in an atmosphere containing a non-oxidizing gas and an oxidizing gas, and forming an upper electrode layer on the ferroelectric film.