Abstract: Authorized interception information from a warrant of a LEA is received for a target user using an LI network packet probe device connected to a network. A set of criteria for interception is created for the target user from the authorized interception information using the probe. The set of criteria is received from the probe using an LI network packet software application running on a different networked device or virtual machine, connected to the network or a different network, and in communication with the probe. Network traffic is monitored at the Ethernet-frame level to and from the different networked device or virtual machine for packets matching the set of criteria using the application. Copies of information from monitored packets that match the set of criteria for interception are sent to the probe using the application in order to provide intercepted information about the target user to the LEA.

Abstract: A probe is disclosed that is capable of providing the lawful interception of communications over a network, such as an LTE network. In embodiments, the probe is a passive probe operable to tap into various different interfaces on the network and intercept communications for law enforcement or intelligence agencies without modification of any hardware or software that is part of the network.

Abstract: Apparatus for performing mixed precision calculations in the floating point unit of a microprocessor from a single instruction opcode. 80-bit floating-point registers (44) may be specified as the source or destination address of a floating-point instruction. When the address range of the destination indicates (26) that a floating point register is addressed, the result of that operation is not rounded to the precision specified by the instruction, but is rounded (58) to extended 80-bit precision and loaded into the floating point register (FP-44). When the address range of the source indicates (26) that an FP register is addressed, the data is loaded from the FP register in extended precision, regardless of the precision specified by the instruction. In this way, real and long-real operations can be made to use extended precision numbers without explicitly specifying that in the opcode.

Abstract: A plurality of global registers are provided on the microprocessor chip. One of a global registers is a frame pointer register containing the current frame pointer, and the remainder of the global registers are available to a current process as general registers. A plurality of floating point registers are also provided for use by the current process in execution of floating point arithmetic operations. A register set pool made up of a plurality of register sets is provided, each register set being comprised of a number of local registers. When a call instruction is decoded, a register set of local registers from the register set pool is allocated to the called procedure, and the frame pointer register is initialized. When a return instruction is decoded, the register set is freed for allocation to another procedure called by a subsequent call instruction.