Patents by Inventor Glenn H. Chapman

Glenn H. Chapman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7408578
    Abstract: An active pixel sensor imaging device comprises array of pixel cells, each pixel cell providing a pixel output signal to a signal output line associated therewith. Each pixel cell comprises: a photosensor having at least two independent portions, each independent portion having a sensor output; and, a separate readout circuit coupled to the sensor output of each independent portion. Each separate readout circuit has an output coupled to the signal output line and each separate readout circuit is capable of generating an output signal at the output. The outputs of the separate readout circuits for the pixel cell are connected such that the output signals are combined in an additive manner to produce the pixel output signal. Hardware and software correction methods are provided for the correction of defective pixels in monochromatic and color imaging systems.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: August 5, 2008
    Inventors: Glenn H. Chapman, Yves Audet, Israel Koren, Zahava Koren
  • Publication number: 20040036788
    Abstract: An active pixel sensor imaging device comprises array of pixel cells, each pixel cell providing a pixel output signal to a signal output line associated therewith. Each pixel cell comprises a photosensor having at least two independent portions, each independent portion having a sensor output; and, a separate readout circuit coupled to the sensor output of each independent portion. Each separate readout circuit has an output coupled to the signal output line and each separate readout circuit is capable of generating an output signal at the output. The outputs of the separate readout circuits for the pixel cell are connected such that the output signals are combined in an additive manner to produce the pixel output signal. Hardware and software correction methods are provided for the correction of defective pixels in monochromatic and color imaging systems.
    Type: Application
    Filed: April 30, 2003
    Publication date: February 26, 2004
    Inventors: Glenn H. Chapman, Yves Audet, Israel Koren, Zahava Koren
  • Patent number: 6150940
    Abstract: An anti-theft power cord for use with electrical devices has sensors for detecting removal of the cord from an electrical receptacle and for detecting the removal of the cord from the device sought to be protected. Control systems associated with each of the sensors activate alarms when receiving signals from the sensors. The control systems, comprising microcontrollers, also communicate with one another along the power cord and will sound an alarm if the cord is cut. A battery backup system is provided to allow the power cord to function as an anti-theft device even during a power failure without sounding false alarms.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: November 21, 2000
    Inventors: Glenn H. Chapman, Mark Zaacks
  • Patent number: 5726443
    Abstract: A vision system and proximity detector is provided in the form of an occluding mask with multiple high aspect light pathways positioned over a light detecting surface. Pixel-based images can be generated to provide a vision system utilizing a variety of illumination modes. Proximity can be measured with a triangulating beam.
    Type: Grant
    Filed: January 18, 1996
    Date of Patent: March 10, 1998
    Inventors: Guy B. Immega, Glenn H. Chapman
  • Patent number: 5087589
    Abstract: A method of fabricating programmable interlayer conductive links in a multilayer integrated circuit structure, comprising the steps of forming elements of either a conductive or semiconductive material as a lower layer, depositing an insulative layer on top of the lower layer elements, implanting ions into one or more link regions of the insulative layer, forming at least one upper conductor over the implanted regions and selectively applying sufficient energy to at least one of the implanted regions of the integrated circuit structure to render the selected link region conductive. The invention also embraces customized integrated circuit structures with interlayer conductive paths made in accordance with this method.
    Type: Grant
    Filed: June 26, 1989
    Date of Patent: February 11, 1992
    Assignee: Massachusetts Institute of Technology
    Inventors: Glenn H. Chapman, Terry O. Herndon
  • Patent number: 4843034
    Abstract: A method of producing interlayer conductive paths having substantially planar top surfaces in a multilayer integrated circuit structure, comprising the steps of forming elements of either a conductive or semiconductive material as a lower layer, depositing an insulative layer on top of the lower layer elements, implanting ions into one or more selected regions of the insulative layer, forming at least one upper conductor over the selected regions and sintering the integrated circuit structure sufficient to render the selected regions conductive. The invention also embraces an integrated circuit structures with interlayer conductive paths made in accordance with this method.
    Type: Grant
    Filed: May 23, 1988
    Date of Patent: June 27, 1989
    Assignee: Massachusetts Institute of Technology
    Inventors: Terry O. Herndon, Glenn H. Chapman
  • Patent number: 4810663
    Abstract: An integrated circuit device including a link point for electrically connecting a plurality of metal layers, comprising a first metal layer, a link insulating layer and a second metal layer. Diffusion barrier may be employed between the link insulator layer and each of the first metal layer and the second metal layer. The metal layers are connected by exposing the link point to a low-power laser for a relatively long pulse width.
    Type: Grant
    Filed: May 6, 1986
    Date of Patent: March 7, 1989
    Assignee: Massachusetts Institute of Technology
    Inventors: Jack I. Raffel, John A. Yasaitis, Glenn H. Chapman, Mark L. Naiman, James A. Burns
  • Patent number: 4636404
    Abstract: A method and apparatus for reliably forming low resistance links between two aluminum conductors deposited on an insulating polysilicon or amorphous silicon layer, employ a laser to bridge a lateral gap between the conductors. The apparatus and method are ideally suited for implementing defect avoidance using redundancy in large random access memories and in complex VLSI circuits. Only a single level of metal is employed and leads to both higher density and lower capacitance in comparison to prior techniques. Resistances in the range of one to ten ohms can be achieved for gap widths of approximately two to three microns.
    Type: Grant
    Filed: September 17, 1984
    Date of Patent: January 13, 1987
    Assignee: Mass. Institute of Technology
    Inventors: Jack I. Raffel, John A. Yasaitis, Glenn H. Chapman
  • Patent number: 4585490
    Abstract: An integrated circuit device including a link point for electrically connecting a plurality of metal layers, comprising a first metal layer, a link insulating layer, a second metal layer and diffusion barrier layers between the link insulator layer and each of the first metal layer and the second metal layer. The metal layers are connected by exposing the link point to a low-power laser for a relatively long pulse width.
    Type: Grant
    Filed: October 3, 1984
    Date of Patent: April 29, 1986
    Assignee: Massachusetts Institute of Technology
    Inventors: Jack I. Raffel, John A. Yasaitis, Glenn H. Chapman, Mark L. Naiman