Abstract: A method for performing color density filtering of images captured in a digital camera having a mechanical shutter and an imaging array including a plurality of pixels each including different color sensors aligned with each other, including opening the mechanical shutter, resetting all of the color sensors in each pixel by asserting a row reset signal, separately asserting color-select signals for each color after the mechanical shutter is opened, independently starting exposure for each different color sensor at a color sensor exposure start time by de-asserting its color select signal, the exposure start time for each different color sensor being a function of a color density filter function, closing the mechanical shutter, and reading color exposure values from the color sensors by separately asserting color-select signals after the mechanical shutter has closed, the reading being unrelated to the start times for the color sensors.

Abstract: A method for performing color density filtering of images captured in a digital camera having a mechanical shutter and an imaging array including a plurality of pixels each including different color sensors aligned with each other, including opening the mechanical shutter, resetting all of the color sensors in each pixel by asserting a row reset signal, separately asserting color-select signals for each color after the mechanical shutter is opened, independently starting exposure for each different color sensor at a color sensor exposure start time by de-asserting its color select signal, the exposure start time for each different color sensor being a function of a color density filter function, closing the mechanical shutter, and reading color exposure values from the color sensors by separately asserting color-select signals after the mechanical shutter has closed, the reading being unrelated to the start times for the color sensors.

Abstract: In a digital camera having an imaging array including a plurality of pixels arranged in rows and columns, the digital camera having a mechanical shutter, a method for performing neutral density filtering of images captured by the imaging array, the method comprising opening the mechanical shutter, operating each row in the array by resetting all of the pixel sensors in the row, starting exposure for all of the pixel sensors in the row, closing the mechanical shutter, reading pixel values from the pixels in the array after the mechanical shutter has closed at a time unrelated to a time at which any pixel-select signal was de-asserted, and wherein the interval of time between starting exposure for all of the pixel sensors in the row and closing the mechanical shutter for each row a function of a neutral density filter function applied to an image to be captured.

Abstract: In a digital camera having an imaging array including a plurality of pixels arranged in rows and columns, the digital camera having a mechanical shutter, a method for performing neutral density filtering of images captured by the imaging array, the method comprising opening the mechanical shutter, operating each row in the array by resetting all of the pixel sensors in the row, starting exposure for all of the pixel sensors in the row, closing the mechanical shutter, reading pixel values from the pixels in the array after the mechanical shutter has closed at a time unrelated to a time at which any pixel-select signal was de-asserted, and wherein the interval of time between starting exposure for all of the pixel sensors in the row and closing the mechanical shutter for each row a function of a neutral density filter function applied to an image to be captured.

Abstract: An active pixel sensor in a p-type semiconductor body includes an n-type common node formed below a pinning region. A plurality of n-type blue detectors more lightly doped than the common node are disposed below pinning regions and are spaced apart from the common node forming channels below blue color-select gates. A buried green photocollector is coupled to the surface through a first deep contact spaced apart from the common node forming a channel below a green color-select gate. A red photocollector buried deeper than the green photocollector is coupled to the surface through a second deep contact spaced apart from the common node forming a channel below a red color-select gate. A reset-transistor has a source disposed over and in contact with the common node. A source-follower transistor has gate coupled to the common node, a drain coupled to a power-supply node, and a source forming a pixel-sensor output.

Abstract: An active pixel sensor in a p-type semiconductor body includes an n-type common node formed below a pinning region. A plurality of n-type blue detectors more lightly doped than the common node are disposed below pinning regions and are spaced apart from the common node forming channels below blue color-select gates. A buried green photocollector is coupled to the surface through a first deep contact spaced apart from the common node forming a channel below a green color-select gate. A red photocollector buried deeper than the green photocollector is coupled to the surface through a second deep contact spaced apart from the common node forming a channel below a red color-select gate. A reset-transistor has a source disposed over and in contact with the common node. A source-follower transistor has gate coupled to the common node, a drain coupled to a power-supply node, and a source forming a pixel-sensor output.

Abstract: An active pixel sensor in a p-type semiconductor body includes an n-type common node formed below a pinning region. A plurality of n-type blue detectors more lightly doped than the common node are disposed below pinning regions and are spaced apart from the common node forming channels below blue color-select gates. A buried green photocollector is coupled to the surface through a first deep contact spaced apart from the common node forming a channel below a green color-select gate. A red photocollector buried deeper than the green photocollector is coupled to the surface through a second deep contact spaced apart from the common node forming a channel below a red color-select gate. A reset-transistor has a source disposed over and in contact with the common node. A source-follower transistor has gate coupled to the common node, a drain coupled to a power-supply node, and a source forming a pixel-sensor output.

Abstract: An active pixel sensor in a p-type semiconductor body includes an n-type common node formed below a pinning region. A plurality of n-type blue detectors more lightly doped than the common node are disposed below pinning regions and are spaced apart from the common node forming channels below blue color-select gates. A buried green photocollector is coupled to the surface through a first deep contact spaced apart from the common node forming a channel below a green color-select gate. A red photocollector buried deeper than the green photocollector is coupled to the surface through a second deep contact spaced apart from the common node forming a channel below a red color-select gate. A reset-transistor has a source disposed over and in contact with the common node. A source-follower transistor has gate coupled to the common node, a drain coupled to a power-supply node, and a source forming a pixel-sensor output.

Abstract: Vertical-color-filter pixel sensors having simplified wiring and reduced transistor counts are disclosed. In an embodiment, a single line is used for reference voltage, pixel reset voltage, and column-output signals in a VCF pixel sensor. In another embodiment, row-reset signals and row-enable signals are sent across a line that is shared between adjacent rows in an array of VCF pixel sensors. The present invention also provides an optimized layout for a VCF pixel sensor with shared row-reset, row-enable, reference voltage and column-output lines as well as a VCF pixel sensor in which source-follower voltage, source-follower amplifier voltage and row-enable signals all share a common line. These combined line embodiments can be used with a single column-output line as well as two row-enable lines. The embodiments can also be implemented in a VCF pixel sensor without a row-enable transistor.

Abstract: Vertical-color-filter pixel sensors having simplified wiring and reduced transistor counts are disclosed. In an embodiment, a single line is used for reference voltage, pixel reset voltage, and column-output signals in a VCF pixel sensor. In another embodiment, row-reset signals and row-enable signals are sent across a line that is shared between adjacent rows in an array of VCF pixel sensors. The present invention also provides an optimized layout for a VCF pixel sensor with shared row-reset, row-enable, reference voltage and column-output lines as well as a VCF pixel sensor in which source-follower voltage, source-follower amplifier voltage and row-enable signals all share a common line. These combined line embodiments can be used with a single column-output line as well as two row-enable lines. The embodiments can also be implemented in a VCF pixel sensor without a row-enable transistor.

Abstract: Photographic flashes use the major portion of available energy in modern cameras. A series of innovations within a photographic flash system improves the energy efficiency by a factor of 3, and thereby extends battery life. The flash system includes a precise flash-termination circuit, a high-efficiency charging circuit, a low-leakage coupled inductor, and a battery-saving charge-circuit drive. Flash termination is controlled by a majority-carrier switching device. This circuit allows termination of the flash current without the timing uncertainty or parasitic leakage associated with previous designs. Multiple flashes also can be produced by the circuit, which may be interfaced with through-the-lens flash controls. A flyback-converter charging circuit uses a coupled inductor that has an alternately layered winding pattern to lower leakage inductance drastically, and uses appropriately selected wire types to decrease skin-effect resistance losses.

Abstract: Copy-protected optical disk format, optical disk recording apparatus for creating disks having such formats and optical disk reading apparatus for reading disks having such formats and for determining whether the disks are authentic. In one aspect, an authentic optical disk has data bit indications along a spiral centerline of the disk, and these data bit indications define a radial wobble which has substantially greater energy at a predefined frequency f.sub.CPW (such as f.sub.CC /392) than at a frequency of f.sub.CC /196, where f.sub.CC is the spatial channel clock frequency. In another aspect, an authorized optical disk has data bit indications along a substantially spiral centerline of the disk, according to a channel clock whose frequency varies across the disk. The disk further has stored thereon an indication of the number of such channel clock cycles which occur along a predetermined test segment of the centerline, optionally together with a pointer to the test segment.

Abstract: An audio channel system provides an analog signal corresponding to a sound waveform in a computer system. The audio channel system includes a plurality of audio channels. Each audio channel contains a predetermined number of audio data samples for producing a particular sound waveform. A plurality of volume bits define a volume level of each audio data sample to be played. An audio processor processes the sound waveforms of each audio channel. The audio processor acts as a shared processing element which receives the audio data samples from each audio channel. The audio processor divides the audio data samples into a plurality of data such that the plurality of data for each audio data sample is pipelined through the audio processor in a serial manner. The plurality of data for each audio data sample for each audio channel is in various processing stages at any given time.

Abstract: An apparatus is provided which is responsive to a multiple bit sample of digital information for producing a pulse width modulated signal, the apparatus comprising: a first signal match detector, responsive to a first subset of the multiple bit sample, for producing a first signal that can transition between first and second logical states; a second signal match detector, responsive to a second subset of the multiple bit sample, for producing a second signal that can transition between the first and second logical states; and a voltage summing circuit for producing a first voltage that is substantially proportional to a magnitude of the first signal in one of the first logical state and the second logical state and for producing a second voltage that is substantially proportional to a magnitude of the second signal in one of the first logical state and the second logical state and for producing an output voltage that is substantially proportional to a sum of the first voltage and the second voltage.