Abstract: A method of displaying a schematic diagram of an integrated circuit design is disclosed. The integrated circuit design includes a plurality of logic blocks and the schematic diagram may include a plurality of connections between respective pairs or groups of the logic blocks. The method includes identifying a plurality of interconnect lines that is adapted to schematically illustrate the plurality of connections. Selected interconnect lines out of the plurality of interconnect lines is identified. Portions of the selected interconnect lines may be channeled through a global connection line on the schematic diagram. The global connection line may be a graphical line that spans from one edge of the schematic diagram to another.

Abstract: Methods, computer program products, and systems for interactively configuring the display of connectivity of a schematic diagram based on an integrated circuit (“IC”) design are provided. Using a set of criteria, the schematic diagram can be configured to reduce visual congestion caused by interconnections among circuit elements in the IC design. The criteria include interconnections having a specific number of fan-outs, interconnections connecting ports of specific types, interconnections connecting selected types of circuit elements, and interconnections connecting circuit elements with specific names. The amount of clutter caused by individual nets can also be reduced based on the total congestion score associated with each net. The total congestion score is calculated based on the number of bends that a net makes, the number of crossovers that a net makes, and the number of pixels required to draw the net.