Patents by Inventor Gokce Gurun

Gokce Gurun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11619959
    Abstract: A voltage regulator circuit included in a computer system may include a switch device coupled between an input power supply node and a regulated power supply node. The switch device may change a value of a supply current flowing from the input power supply node and the regulated power supply node to regulate a voltage level of the regulated power supply node. A noise cancelation current may be feed forward onto a control terminal of the switch device to cancel noise on the regulated power supply node resulting from noise present on the input power supply node.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: April 4, 2023
    Assignee: Apple Inc.
    Inventors: Gokce Gurun, Sanjeev K. Maheshwari, Wenbo Liu
  • Publication number: 20220091622
    Abstract: A voltage regulator circuit included in a computer system may include a switch device coupled between an input power supply node and a regulated power supply node. The switch device may change a value of a supply current flowing from the input power supply node and the regulated power supply node to regulate a voltage level of the regulated power supply node. A noise cancelation current may be feed forward onto a control terminal of the switch device to cancel noise on the regulated power supply node resulting from noise present on the input power supply node.
    Type: Application
    Filed: September 23, 2020
    Publication date: March 24, 2022
    Inventors: Gokce Gurun, Sanjeev K. Maheshwari, Wenbo Liu
  • Patent number: 8891334
    Abstract: A CMUT on CMOS imaging chip is disclosed. The imaging chip can use direct connection, CMOS architecture to minimize both internal and external connection complexity. Intelligent power management can enable the chip to be used for various imaging applications with strict power constraints, including forward-looking intra-vascular ultrasound imaging. The chip can use digital logic to control transmit and receive events to minimize power consumption and maximize image resolution. The chip can be integrated into a probe, or catheter, and requires minimal external connections. The chip can comprise integrated temperature control to prevent overheating.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: November 18, 2014
    Assignee: Georgia Tech Research Corporation
    Inventors: F. Levent Degertekin, Gokce Gurun, Mustafa Karaman, Jennifer O. Hasler
  • Patent number: 8766459
    Abstract: Capacitive micromachined ultrasonic transducer (“CMUT”) devices and fabrication methods are provided. The CMUT devices can include integrated circuit devices utilizing direct connections to various CMOS electronic components. The use of integrated connections can reduce overall package size and improve functionality for use in ultrasonic imaging applications. CMUT devices can also be manufactured on multiple silicon chip layers with each layer connected utilizing through silicon vias (TSVs). External power connections can be provided if high biasing voltages are required. Forward and side looking CMUT arrays can be manufactured for use in a variety of ultrasound technologies.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: July 1, 2014
    Assignee: Georgia Tech Research Corporation
    Inventors: F. Levent Degertekin, Gokce Gurun, Jaime Zahorian, Michael Hochman
  • Publication number: 20130127065
    Abstract: Capacitive micromachined ultrasonic transducer (“CMUT”) devices and fabrication methods are provided. The CMUT devices can include integrated circuit devices utilizing direct connections to various CMOS electronic components. The use of integrated connections can reduce overall package size and improve functionality for use in ultrasonic imaging applications. CMUT devices can also be manufactured on multiple silicon chip layers with each layer connected utilizing through silicon vias (TSVs). External power connections can be provided if high biasing voltages are required. Forward and side looking CMUT arrays can be manufactured for use in a variety of ultrasound technologies.
    Type: Application
    Filed: May 3, 2011
    Publication date: May 23, 2013
    Inventors: Levent F. Degertekin, Gokce Gurun, Jaime Zahorian, Michael Hochman
  • Publication number: 20130064043
    Abstract: A CMUT on CMOS imaging chip is disclosed. The imaging chip can use direct connection, CMOS architecture to minimize both internal and external connection complexity. Intelligent power management can enable the chip to be used for various imaging applications with strict power constraints, including forward-looking intra-vascular ultrasound imaging. The chip can use digital logic to control transmit and receive events to minimize power consumption and maximize image resolution. The chip can be integrated into a probe, or catheter, and requires minimal external connections. The chip can comprise integrated temperature control to prevent overheating.
    Type: Application
    Filed: March 5, 2012
    Publication date: March 14, 2013
    Applicant: Georgia Tech Research Corporation
    Inventors: F. Levent DEGERTEKIN, Gokce Gurun, Mustafa Karaman, Jennifer O. Hasler