Abstract: A processing unit can include a performance monitor for monitoring the performance of the processing unit and associated sub-units. The performance monitor includes a logic analyzer, and implements a state machine via state machine data entries stored in a memory associated with the performance monitor. A state machine data entry includes output signals associated with state transitions. The output signals include a next state and a trigger to the logic analyzer. The performance monitor implements logic circuits that determine, based on input signals and the state machine data entries, the next state to transition and associated output signals. If a state transition includes a trigger to the logic analyzer, the trigger is transmitted to the logic analyzer. In response to the trigger, the logic analyzer assembles and samples input signals and stores the sampled input signals into the memory associated with the performance monitor, overwriting the state machine data entries.

Abstract: A processing unit can include a performance monitor for monitoring the performance of the processing unit and associated sub-units. The performance monitor can include a state machine. The state machine can be implemented via state machine data entries stored in a memory associated with the performance monitor. A state machine data entry includes information indicating a state transition condition and output signals. The state transition condition includes a current state and input signals required to meet the condition. The output signals include a next state, one or more counter actions, and one or more triggers. The performance monitor implements logic circuits that determine, based on input signals and the state machine data entries, the next state to transition and associated output signals. The state machine data entries can be written and re-written by a user.

Abstract: A processing unit can include a performance monitor for monitoring the performance of the processing unit and associated sub-units. The performance monitor includes a logic analyzer, and implements a state machine via state machine data entries stored in a memory associated with the performance monitor. A state machine data entry includes output signals associated with state transitions. The output signals include a next state and a trigger to the logic analyzer. The performance monitor implements logic circuits that determine, based on input signals and the state machine data entries, the next state to transition and associated output signals. If a state transition includes a trigger to the logic analyzer, the trigger is transmitted to the logic analyzer. In response to the trigger, the logic analyzer assembles and samples input signals and stores the sampled input signals into the memory associated with the performance monitor, overwriting the state machine data entries.

Abstract: A processing unit can include a performance monitor for monitoring the performance of the processing unit and associated sub-units. The performance monitor can include a state machine. The state machine can be implemented via state machine data entries stored in a memory associated with the performance monitor. A state machine data entry includes information indicating a state transition condition and output signals. The state transition condition includes a current state and input signals required to meet the condition. The output signals include a next state, one or more counter actions, and one or more triggers. The performance monitor implements logic circuits that determine, based on input signals and the state machine data entries, the next state to transition and associated output signals. The state machine data entries can be written and re-written by a user.

Abstract: Aspects of the disclosure include a device for processing media samples. The device includes a frame decoder, a buffer, and a placement manager. The frame decoder is configured to receive a data frame from a source outside the device, extract from the data frame a first sample, and determine a first designated playback time of the first sample. The buffer has memory portions, and addresses of the memory portions are associated with a reference time and time increments of a local sampling period of the device. The placement manager is configured to store the first sample in a first memory portion of the buffer having a first address that is associated with a first time increment that most closely corresponds to the first designated playback time of the first sample.

Abstract: A multi-stage receiver including, in one embodiment, a sequence of processing stages. At least one of the processing stages includes a first processing block, a delay block, and a second processing block. The first processing block is adapted to receive an input signal and generate from the input signal one or more processing parameters. The delay block is adapted to generate a delayed signal. The second processing block is adapted to apply the one or more processing parameters to the delayed signal to generate an output signal. The delay block compensates for one or more processing delays associated with the generation of the one or more processing parameters by the first processing block.

Abstract: In one embodiment, a buffer-based method for generating codes (such as Orthogonal Variable Spreading Factor (OVSF) codes) for spreading and despreading data, without using a chip-rate counter. First, a buffer is populated with initial values based on a received spreading factor and desired code index. Next, a timing strobe is received, and the values in the buffer are changed upon receipt of the timing strobe based on an algorithm that is independent of any count value associated with the timing strobe. Finally, a code sequence value is generated based on the values in the buffer.

Abstract: In one embodiment, a buffer-based method for generating codes (such as Orthogonal Variable Spreading Factor (OVSF) codes) for spreading and despreading data, without using a chip-rate counter. First, a buffer is populated with initial values based on a received spreading factor and desired code index. Next, a timing strobe is received, and the values in the buffer are changed upon receipt of the timing strobe based on an algorithm that is independent of any count value associated with the timing strobe. Finally, a code sequence value is generated based on the values in the buffer.

Abstract: A method of generating a code sequence comprises populating at least one buffer with initial values based on a received spreading factor and desired code index; receiving a timing strobe; changing the values in the at least one buffer upon receipt of the timing strobe based on an algorithm that is independent of any count value associated with the timing strobe; and outputting at least one code sequence value based on the values in the at least one buffer. An apparatus for generating a code sequence comprises means for populating at least one buffer with initial values based on a received spreading factor and desired code index; means for receiving a timing strobe; means for changing the values in the at least one buffer upon receipt of the timing strobe based on an algorithm that is independent of any count value associated with the timing strobe; and means for outputting at least one code sequence value based on the values in the at least one buffer.

Abstract: A rake receiver for processing a multi-path input signal received from a communications channel, wherein each multi-path component of the multi-path input signal comprises one or more symbols, comprises a plurality of fingers and a demodulator. Each of the plurality of fingers is adapted to receive the multi-path input signal and provide a sequence of input samples corresponding to a multi-path component of the multi-path input signal. The demodulator is adapted (i) during a single clock period, to receive and process one or more input samples corresponding to only one of the fingers, (ii) for each of the fingers, to accumulate multiple processed input samples to form a symbol, and (iii) to provide the formed symbols for all fingers.

Abstract: A despreader for generating one or more despread values corresponding to application of one or more despreading codes to a sequence of spread values comprises a data buffer, an adder, a subtractor, and a controller. The adder is adapted to generate a sum of a pair of values read from the data buffer. The subtractor is adapted to generate a difference of the pair of values read from the data buffer. The controller is adapted to control (1) reading of the pair of values from the data buffer and (2) writing of the sum and difference values into the data buffer. After each pair of spread values is stored in the data buffer, the despreader generates and stores one or more pairs of sum and difference values in the data buffer.

Abstract: In one embodiment, an HSDPA co-processor for 3GPP Release 6 Category 8 (7.2 Mb/s) HSDPA that provides all chip-rate, symbol-rate, physical-channel, and transport-channel processing for HSDPA in 90 nm CMOS. The co-processor design is scalable to all HSDPA data rates up to 14 Mb/s. The coprocessor implements an Advanced Receiver based on an NLMS equalizer, supports RX diversity and TX diversity, and provides up to 6.4 dB better performance than a typical single-antenna rake receiver. Thus, 3GPP R6 HSDPA functionality can be added to a legacy R99 modem using an HSDPA co-processor consistent with embodiments of the present invention, at a reasonable incremental cost and power.

Abstract: A rake receiver for processing a multi-path input signal received from a communications channel, wherein each multi-path component of the multi-path input signal comprises one or more symbols, comprises a plurality of fingers and a demodulator. Each of the plurality of fingers is adapted to receive the multi-path input signal and provide a sequence of input samples corresponding to a multi-path component of the multi-path input signal. The demodulator is adapted (i) during a single clock period, to receive and process one or more input samples corresponding to only one of the fingers, (ii) for each of the fingers, to accumulate multiple processed input samples to form a symbol, and (iii) to provide the formed symbols for all fingers.

Abstract: A rake receiver for processing a multi-path input signal received from a communications channel, wherein each multi-path component of the multi-path input signal comprises one or more symbols, comprises a plurality of fingers and a demodulator. Each of the plurality of fingers is adapted to receive the multi-path input signal and provide a sequence of input samples corresponding to a multi-path component of the multi-path input signal. The demodulator is adapted (i) during a single clock period, to receive and process one or more input samples corresponding to only one of the fingers, (ii) for each of the fingers, to accumulate multiple processed input samples to form a symbol, and (iii) to provide the formed symbols for all fingers.

Abstract: A multi-stage receiver including, in one embodiment, a sequence of processing stages. At least one of the processing stages includes a first processing block, a delay block, and a second processing block. The first processing block is adapted to receive an input signal and generate from the input signal one or more processing parameters. The delay block is adapted to generate a delayed signal. The second processing block is adapted to apply the one or more processing parameters to the delayed signal to generate an output signal. The delay block compensates for one or more processing delays associated with the generation of the one or more processing parameters by the first processing block.

Abstract: A method of generating a code sequence comprises populating at least one buffer with initial values based on a received spreading factor and desired code index; receiving a timing strobe; changing the values in the at least one buffer upon receipt of the timing strobe based on an algorithm that is independent of any count value associated with the timing strobe; and outputting at least one code sequence value based on the values in the at least one buffer. An apparatus for generating a code sequence comprises means for populating at least one buffer with initial values based on a received spreading factor and desired code index; means for receiving a timing strobe; means for changing the values in the at least one buffer upon receipt of the timing strobe based on an algorithm that is independent of any count value associated with the timing strobe; and means for outputting at least one code sequence value based on the values in the at least one buffer.

Abstract: A despreader for generating one or more despread values corresponding to application of one or more despreading codes to a sequence of spread values comprises a data buffer, an adder, a subtractor, and a controller. The adder is adapted to generate a sum of a pair of values read from the data buffer. The subtractor is adapted to generate a difference of the pair of values read from the data buffer. The controller is adapted to control (1) reading of the pair of values from the data buffer and (2) writing of the sum and difference values into the data buffer. After each pair of spread values is stored in the data buffer, the despreader generates and stores one or more pairs of sum and difference values in the data buffer.

Abstract: A rake receiver for processing a multi-path input signal received from a communications channel, wherein each multi-path component of the multi-path input signal comprises one or more symbols, comprises a plurality of fingers and a demodulator. Each of the plurality of fingers is adapted to receive the multi-path input signal and provide a sequence of input samples corresponding to a multi-path component of the multi-path input signal. The demodulator is adapted (i) during a single clock period, to receive and process one or more input samples corresponding to only one of the fingers, (ii) for each of the fingers, to accumulate multiple processed input samples to form a symbol, and (iii) to provide the formed symbols for all fingers.