Abstract: An apparatus for the transfer of samples from an analytical instrument has a sealable transfer capsule and a means for connecting the transfer capsule to a vacuum instrument, such as a FIB, through an interface connected to the instrument. The capsule has a door that can be opened to insert a sample holder, such as a TEM sample holder, into the instrument, and then closed when the sample holder holding an excised sample is retracted back into the transfer capsule. The instrument interface contains means for sealing the instrument before the transfer capsule holding a sample is disconnected, and for purging the transfer capsule with an inert gas. The sample may thus be transported in the sealed transfer capsule without exposure to the ambient atmosphere. The sample may be transported to and connected to a glove box also purged with an inert gas for examination or further operations.

Abstract: A method for sample examination in a dual-beam FIB calculates a first angle as a function of second, third and fourth angles defined by the geometry of the FIB and the tilt of the specimen stage. A fifth angle is calculated as a function of the stated angles, where the fifth angle is the angle between the long axis of an excised sample and the projection of the axis of the probe shaft onto the X-Y plane. The specimen stage is rotated by the calculated fifth angle, followed by attachment to the probe tip and lift-out. The sample may then be positioned perpendicular to the axis of the FIB electron beam for STEM analysis by rotation of the probe shaft through the first angle.

Abstract: A package includes a first and a second wafer stored therein in a stacked configuration. The first wafer has interconnection conductor material portions extending from a first surface thereof. The interconnection conductor material portions have a maximum height. An interleaf member is located between the first and second wafers. A first recessed portion is formed in the interleaf member, and it has an outer perimeter shape corresponding to an outer perimeter shape of the first wafer. The first recessed portion has a first depth from a top surface of the interleaf member. A second recessed portion is formed in the interleaf member and located at least partially within the first recessed portion, and it has a bottom surface at a second depth from the top surface. The second depth is greater than the first depth. The second depth minus the first depth is greater than the maximum height.

Abstract: A TEM sample holder is formed from at least one nano-manipulator probe tip and a TEM sample holder pre-form. The probe tip is permanently attached to the TEM sample-holder pre-form to create a TEM sample holder before attachment of a sample to the probe tip inside a FIB. In the preferred embodiment the probe tip is attached to the TEM sample holder pre-form by applying pressure to the pre-form and the probe tip, so as to cause plastic flow of the pre-form material about the probe tip. The TEM sample holder may have smaller dimensions than the TEM sample holder pre-form; in this case the TEM sample holder is cut from the larger TEM sample holder pre-form, preferably in the same operation as attaching the probe tip.

Abstract: A method and an apparatus for uniform electroless plating of layers onto exposed metallizations in integrated circuits such as bond pads. The apparatus provides means for holding a plurality of wafers, and rotating each wafer at constant speed and synchronous within the plurality. Immersed in a plating solution flowing in substantially laminar motion and at constant speed, the method creates periodic superposition of directions and speeds of the motion of the wafers and the motion of the plating solution. The invention creates periodically changing wafer portions where the directions and speeds are additive and where the directions and speeds are opposed and subtractive. Consequently, highly uniformly layers are electrolessly plated onto the exposed metallizations of bond pads. If the plated layers are bondable metals, the process transforms otherwise unbondable pad metallization into bondable pads.

Abstract: A package includes a first and a second wafer stored therein in a stacked configuration. The first wafer has interconnection conductor material portions extending from a first surface thereof. The interconnection conductor material portions have a maximum height. An interleaf member is located between the first and second wafers. A first recessed portion is formed in the interleaf member, and it has an outer perimeter shape corresponding to an outer perimeter shape of the first wafer. The first recessed portion has a first depth from a top surface of the interleaf member. A second recessed portion is formed in the interleaf member and located at least partially within the first recessed portion, and it has a bottom surface at a second depth from the top surface. The second depth is greater than the first depth. The second depth minus the first depth is greater than the maximum height.

Abstract: A method and an apparatus for uniform electroless plating of layers onto exposed metallizations in integrated circuits such as bond pads. The apparatus provides means for holding a plurality of wafers, and rotating each wafer at constant speed and synchronous within the plurality. Immersed in a plating solution flowing in substantially laminar motion and at constant speed, the method creates periodic superposition of directions and speeds of the motion of the wafers and the motion of the plating solution. The invention creates periodically changing wafer portions where the directions and speeds are additive and where the directions and speeds are opposed and subtractive. Consequently, highly uniformly layers are electrolessly plated onto the exposed metallizations of bond pads. If the plated layers are bondable metals, the process transforms otherwise unbondable pad metallization into bondable pads.

Abstract: An improved bump fabrication process is described that produces a larger diameter/taller solder ball than with a standard mushroom by forming an elongated mushroom having a short axis in the direction of adjacent connection mushrooms and an elongated axis orthogonal to the short axis. The increased larger volume solder when reflowed produces the larger diameter/taller bolder ball bump.

Abstract: A package includes a first and a second wafer stored therein in a stacked configuration. The first wafer has interconnection conductor material portions extending from a first surface thereof. The interconnection conductor material portions have a maximum height. An interleaf member is located between the first and second wafers. A first recessed portion is formed in the interleaf member, and it has an outer perimeter shape corresponding to an outer perimeter shape of the first wafer. The first recessed portion has a first depth from a top surface of the interleaf member. A second recessed portion is formed in the interleaf member and located at least partially within the first recessed portion, and it has a bottom surface at a second depth from the top surface. The second depth is greater than the first depth. The second depth minus the first depth is greater than the maximum height.

Abstract: A robust, reliable and low-cost metal structure and process enabling electrical wire/ribbon connections to the interconnecting copper metallization of integrated circuits. The structure comprises a layer of barrier metal that resists copper diffusion, deposited on the non-oxidized copper surface in a thickness such that the barrier layer reduces the diffusion of copper at 250° C. by more than 80% compared with the absence of the barrier metal. The structure further comprises an outermost bondable layer which reduces the diffusion of the barrier metal at 250° C. by more than 80% compared with the absence of the bondable metal. Finally, a metal wire is bonded to the outermost layer for metallurgical connection. The barrier metal is selected from a group consisting of nickel, cobalt, chromium, molybdenum, titanium, tungsten, and alloys thereof. The outermost bondable metal layer is selected from a group consisting of gold, platinum, and silver.

Abstract: A robust, reliable and low-cost metal structure and process enabling electrical wire/ribbon connections to the interconnecting copper metallization of integrated circuits. The structure comprises a layer of barrier metal that resists copper diffusion, deposited on the non-oxidized copper surface in a thickness such that the barrier layer reduces the diffusion of copper at 250° C. by more than 80% compared with the absence of the barrier metal. The structure further comprises an outermost bondable layer which reduces the diffusion of the barrier metal at 250° C. by more than 80% compared with the absence of the bondable metal. Finally, a metal wire is bonded to the outermost layer for metallurgical connection. The barrier metal is selected from a group consisting of nickel, cobalt, chromium, molybdenum, titanium, tungsten, and alloys thereof. The outermost bondable metal layer is selected from a group consisting of gold, platinum, and silver.

Abstract: An improved bump fabrication process is described that produces a larger diameter/taller solder ball than with a standard mushroom by forming an elongated mushroom having a short axis in the direction of adjacent connection mushrooms and an elongated axis orthogonal to the short axis. The increased larger volume solder when reflowed produces the larger diameter/taller bolder ball bump.

Abstract: A package includes a first and a second wafer stored therein in a stacked configuration. The first wafer has interconnection conductor material portions extending from a first surface thereof. The interconnection conductor material portions have a maximum height. An interleaf member is located between the first and second wafers. A first recessed portion is formed in the interleaf member, and it has an outer perimeter shape corresponding to an outer perimeter shape of the first wafer. The first recessed portion has a first depth from a top surface of the interleaf member. A second recessed portion is formed in the interleaf member and located at least partially within the first recessed portion, and it has a bottom surface at a second depth from the top surface. The second depth is greater than the first depth. The second depth minus the first depth is greater than the maximum height.

Abstract: A method and an apparatus for uniform electroless plating of layers onto exposed metallizations in integrated circuits such as bond pads. The apparatus provides means for holding a plurality of wafers, and rotating each wafer at constant speed and synchronous within the plurality. Immersed in a plating solution flowing in substantially laminar motion and at constant speed, the method creates periodic superposition of directions and speeds of the motion of the wafers and the motion of the plating solution. The invention creates periodically changing wafer portions where the directions and speeds are additive and where the directions and speeds are opposed and subtractive. Consequently, highly uniformly layers are electrolessly plated onto the exposed metallizations of bond pads. If the plated layers are bondable metals, the process transforms otherwise unbondable pad metallization into bondable pads.

Abstract: An improved bump fabrication process is described that produces a larger diameter/taller solder ball than with a standard mushroom by forming an elongated mushroom having a short axis in the direction of adjacent connection mushrooms and an elongated axis orthogonal to the short axis. The increased larger volume solder when reflowed produces the larger diameter/taller bolder ball bump.

Abstract: A metal structure for an integrated circuit having a plurality of contact pads and a patterned metallization protected by an overcoat layer. The structure comprises a plurality of windows in the overcoat, selectively exposing the chip metallization, wherein the windows are spaced apart by less than 150 &mgr;m center to center. A metal column is positioned on each of the windows; the preferred metal is copper; the column has a height-to-width aspect ratio larger than 1.25 and an upper surface wettable by re-flowable metal. The preferred column height-to-width aspect ratio is between 2.0 and 4.0, operable to absorb thermomechanical stress. A cap of a re-flowable metal is positioned on each of the columns. The metal structure is used for attaching the IC chip to an external part.

Abstract: An improved bump fabrication process is described that produces a larger diameter/taller solder ball than with a standard mushroom by forming an elongated mushroom having a short axis in the direction of adjacent connection mushrooms and an elongated axis orthogonal to the short axis. The increased larger volume solder when reflowed produces the larger diameter/taller bolder ball bump.

Abstract: A microelectronic mechanical structure (MEMS) comprising a semiconductor chip having an integrated circuit including a plurality of micromechanical components, and a plurality of conductive routing lines integral with the chip; the routing lines having contact terminals of oxide-free metal; and the terminals having a layer of barrier metal on the oxide-free metal and an outermost layer of noble metal, whereby damage-free testing of the circuit is possible using test probe needles.

Abstract: A robust, reliable and low-cost metal structure and process enabling electrical wire/ribbon connections to the interconnecting copper metallization of integrated circuits. The structure comprises a layer of first barrier metal, deposited on the non-oxidized copper surface, having a copper diffusion coefficient of less than 1×10E-23 cm2/s at 250° C. and a thickness from about 0.5 to 1.5 &mgr;m. It further comprises a layer of second barrier metal on the layer of first barrier metal, having a diffusion coefficient of the first barrier metal of less than 1×10E-14 cm2/s at 250° C. and a thickness of less than 1.5 &mgr;m. It finally comprises an outermost layer of bondable metal, onto which a metal wire is bonded for metallurgical connection.

Abstract: A wafer-scale assembly apparatus for integrated circuits and method for forming the wafer-scale assembly. A semiconductor wafer including a plurality of circuits is provided with a plurality of metal contact pads as electrical entry and exit ports. A first wafer-scale patterned polymer film carrying solder balls for each of the contact pads on the wafer is positioned opposite the wafer, and the wafer and the film are aligned. The film is brought into contact with the wafer. Radiant energy in the near infrared spectrum is applied to the backside of the wafer, heating the wafer uniformly and rapidly without moving the semiconductor wafer. Thermal energy is transferred through the wafer to the surface of the wafer and into the solder balls, which reflow onto the contact pads, while the thermal stretching of the polymer film is mechanically compensated. The uniformity of the height of the liquid solder balls is controlled either by mechanical stoppers or by the precision linear motion of motors.