Abstract: An electrostatic discharge (ESD) circuit including a booster cell is disclosed. The ESD circuit may include first and second rails configured to provide power to the ESD circuit. The first rail may include two spaced apart conductors. The ESD circuit may further include an input/output (I/O) pad and a power/ground (P/G) pad. The P/G pad may include a power clamp electrically coupled between the first and second rails. The booster cell may be physically located between the I/O pad and the P/G pad. The booster cell may provide an electrical connection between the two spaced apart conductors.

Abstract: An electrostatic discharge (ESD) circuit including a booster cell is disclosed. The ESD circuit may include first and second rails configured to provide power to the ESD circuit. The first rail may include two spaced apart conductors. The ESD circuit may further include an input/output (I/O) pad and a power/ground (P/G) pad. The P/G pad may include a power clamp electrically coupled between the first and second rails. The booster cell may be physically located between the I/O pad and the P/G pad. The booster cell may provide an electrical connection between the two spaced apart conductors.

Abstract: A PVT calibration system of an electronic device may select a temperature band of a plurality of temperature bands based on a detected device temperature. A comparator of the calibration system may compare a process characterization voltage with one or both of an upper bound level and a lower bound level of a reference voltage band associated with the selected temperature band. Based on the comparison, the PVT calibration system may identify a process characterization of the electronic device. The PVT calibration system may use the identification, along with identified device temperature and supply voltage levels to calibrate an impedance of I/O driver circuitry of the electronic device.