Abstract: An apparatus includes control circuits configured to connect to a plurality of non-volatile memory cells. Each non-volatile memory cell is configured to store a plurality of bits of a plurality of logical pages including at least a first bit of a first logical page, a second bit of a second logical page and a third bit of a third logical page. The control circuits are configured to select a subset of the plurality of logical pages for reading, perform pre-read steps, and read a first and at least a second selected logical page of the subset without performing pre-read steps between reading the first and second selected logical pages.

Abstract: An apparatus includes control circuits configured to connect to a plurality of non-volatile memory cells. Each non-volatile memory cell is configured to store a plurality of bits of a plurality of logical pages including at least a first bit of a first logical page, a second bit of a second logical page and a third bit of a third logical page. The control circuits are configured to select a subset of the plurality of logical pages for reading, perform pre-read steps, and read a first and at least a second selected logical page of the subset without performing pre-read steps between reading the first and second selected logical pages.

Abstract: Apparatuses, systems, methods, and computer program products for enhanced erase retry of a non-volatile storage device are disclosed. An apparatus includes a non-volatile storage device and a controller. A controller includes a verification component configured to detect that an erase operation performed on an erase block of a non-volatile storage device is unsuccessful. A controller includes a parameter component configured to adjust one or more erase parameters for an erase operation. One or more erase parameters may be associated with one or more select gate drain storage cells of an erase block. A controller includes an erase component configured to retry an erase operation on an erase block with one or more adjusted erase parameters.

Abstract: Apparatuses, systems, and methods are disclosed for read threshold adjustment using reference data for non-volatile memory. An apparatus may include an array of non-volatile memory cells and a controller. A controller may be configured to write a predetermined reference data pattern to a region of an array. A controller may be configured to read reference data from a region. A controller may be configured to set one or more read thresholds based on identifying differences between reference data and a predetermined reference data pattern.

Abstract: Apparatuses, systems, and methods are disclosed for read threshold adjustment using reference data for non-volatile memory. An apparatus may include an array of non-volatile memory cells and a controller. A controller may be configured to write a predetermined reference data pattern to a region of an array. A controller may be configured to read reference data from a region. A controller may be configured to set one or more read thresholds based on identifying differences between reference data and a predetermined reference data pattern.

Abstract: Apparatuses, systems, methods, and computer program products for enhanced erase retry of a non-volatile storage device are disclosed. An apparatus includes a non-volatile storage device and a controller. A controller includes a verification component configured to detect that an erase operation performed on an erase block of a non-volatile storage device is unsuccessful. A controller includes a parameter component configured to adjust one or more erase parameters for an erase operation. One or more erase parameters may be associated with one or more select gate drain storage cells of an erase block. A controller includes an erase component configured to retry an erase operation on an erase block with one or more adjusted erase parameters.