Patents by Inventor Goran S. Matijasevic

Goran S. Matijasevic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6127619
    Abstract: A method for cost-effectively producing thermoelectric elements and thermoelectric modules with a multitude of thermoelectric couples is disclosed. This method makes the fabrication of very small size thermoelectric elements and miniaturized, compact, powerful thermoelectric modules possible. Methods of the present invention can be also used to fabricate integrated thermoelectric modules in electrical or other devices. The invented method is based on an additive technology using thermoelectric pastes and a patternable insulator layer. Layers of conductive traces are first fabricated on the two insulating planes. A patternable insulator layer is formed and filled with P- and N-type thermoelectric pastes. The thermoelectric elements are formed during the curing or sintering of the thermoelectric pastes. Sizes and positions of the thermoelectric elements are defined by the patterned insulator layer.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: October 3, 2000
    Assignee: Ormet Corporation
    Inventors: Xiaomei Xi, Goran S. Matijasevic, Lutz Brandt, Linh Ha
  • Patent number: 5948533
    Abstract: In accordance with the present invention, there are provided novel vertically interconnected assemblies and compositions useful therefore. Invention assemblies comprise substrate boards with multiple layer electronic assemblies. The multiple layers comprise individual layers of circuitry separated and adhered by dielectric materials selectively coated and/or filled with a transient liquid phase sintered (TLPS) material. The TLPS is formulated to be electrically conductive, and thereby serves to convey current between the layers of circuitry. In addition, the TLPS is easily workable so that it is amenable to automated, stepwise construction of multilayer circuitry without the need for labor intensive drilling and filling of conductive vias.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: September 7, 1999
    Assignee: Ormet Corporation
    Inventors: Catherine A. Gallagher, Goran S. Matijasevic, Pradeep Gandhi, M. Albert Capote